Searched refs:NewDst (Results 1 – 6 of 6) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFixSGPRCopies.cpp | 158 bool tryMoveVGPRConstToSGPR(MachineOperand &MO, Register NewDst, 664 Register NewDst = MRI->createVirtualRegister(DestRC); in runOnMachineFunction() local 671 if (!tryMoveVGPRConstToSGPR(MO, NewDst, BlockToInsertCopy, in runOnMachineFunction() 676 TII->get(AMDGPU::COPY), NewDst) in runOnMachineFunction() 678 MO.setReg(NewDst); in runOnMachineFunction()
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H A D | SIInstrInfo.cpp | 7323 Register NewDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in moveToVALUImpl() local 7327 BuildMI(*MBB, Inst, DL, get(NewOpcode), NewDst) in moveToVALUImpl() 7333 MRI.replaceRegWith(Inst.getOperand(0).getReg(), NewDst); in moveToVALUImpl() 7334 addUsersToMoveToVALUWorklist(NewDst, MRI, Worklist); in moveToVALUImpl() 7343 Register NewDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in moveToVALUImpl() local 7344 MachineInstr *NewInstr = BuildMI(*MBB, Inst, DL, get(NewOpcode), NewDst) in moveToVALUImpl() 7351 MRI.replaceRegWith(Inst.getOperand(0).getReg(), NewDst); in moveToVALUImpl() 7354 addUsersToMoveToVALUWorklist(NewDst, MRI, Worklist); in moveToVALUImpl()
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H A D | SIISelLowering.cpp | 15180 unsigned NewDst = 0; // Final initialized value will be in here in AddMemOpInit() local 15190 NewDst = MRI.createVirtualRegister(TII->getOpRegClass(MI, DstIdx)); in AddMemOpInit() 15196 BuildMI(MBB, MI, DL, TII->get(TargetOpcode::INSERT_SUBREG), NewDst) in AddMemOpInit() 15201 PrevDst = NewDst; in AddMemOpInit() 15205 MI.addOperand(MachineOperand::CreateReg(NewDst, false, true)); in AddMemOpInit()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64LegalizerInfo.cpp | 1589 auto NewDst = MRI.createGenericVirtualRegister(NewDstTy); in legalizeIntrinsic() local 1592 MI.getOperand(0).setReg(NewDst); in legalizeIntrinsic() 1597 OldDst, NewDst); in legalizeIntrinsic()
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H A D | AArch64InstructionSelector.cpp | 2962 Register NewDst = in select() local 2964 LdSt.getOperand(0).setReg(NewDst); in select() 2965 MRI.setRegBank(NewDst, RB); in select() 2970 .addUse(NewDst) in select() 5660 Register NewDst = MRI.createVirtualRegister(&AArch64::FPR128RegClass); in emitConstantVector() local 5661 NewOp->getOperand(0).setReg(NewDst); in emitConstantVector() 5662 return MIRBuilder.buildInstr(NegOpc, {Dst}, {NewDst}); in emitConstantVector()
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
H A D | CodeGenDAGPatterns.cpp | 4418 TreePatternNodePtr NewDst = P.getDstPattern().clone(); in ExpandHwModeBasedTypes() local 4419 if (!NewSrc->setDefaultMode(Mode) || !NewDst->setDefaultMode(Mode)) { in ExpandHwModeBasedTypes() 4425 std::move(NewDst), P.getDstRegs(), P.getAddedComplexity(), in ExpandHwModeBasedTypes()
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