| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupBWInsts.cpp | 283 Register NewDestReg = getSuperRegDestIfDead(MI); in tryReplaceLoad() local
284 if (!NewDestReg) in tryReplaceLoad()
289 BuildMI(*MF, MIMetadata(*MI), TII->get(New32BitOpcode), NewDestReg); in tryReplaceLoad()
313 Register NewDestReg = getSuperRegDestIfDead(MI); in tryReplaceCopy() local
314 if (!NewDestReg) in tryReplaceCopy()
324 TRI->getSubRegIndex(NewDestReg, OldDest.getReg())) in tryReplaceCopy()
333 BuildMI(*MF, MIMetadata(*MI), TII->get(X86::MOV32rr), NewDestReg) in tryReplaceCopy()
339 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg)) in tryReplaceCopy()
347 Register NewDestReg = getSuperRegDestIfDead(MI); in tryReplaceExtend() local
348 if (!NewDestReg) in tryReplaceExtend()
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| H A D | X86RegisterInfo.cpp | 824 Register NewDestReg = MI.getOperand(0).getReg(); in tryOptimizeLEAtoMOV() local
827 TII->copyPhysReg(*MI.getParent(), II, MI.getDebugLoc(), NewDestReg, BasePtr, in tryOptimizeLEAtoMOV()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CondBrTuning.cpp | 99 Register NewDestReg = MI.getOperand(0).getReg(); in convertToFlagSetting() local
101 NewDestReg = Is64Bit ? AArch64::XZR : AArch64::WZR; in convertToFlagSetting()
104 TII->get(NewOpc), NewDestReg); in convertToFlagSetting()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 591 Register NewDestReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMaterializeGV() local
594 MIMD, TII.get(Opc), NewDestReg) in ARMMaterializeGV()
598 return NewDestReg; in ARMMaterializeGV()
606 Register NewDestReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMaterializeGV() local
609 TII.get(ARM::t2LDRi12), NewDestReg) in ARMMaterializeGV()
614 TII.get(ARM::LDRi12), NewDestReg) in ARMMaterializeGV()
617 DestReg = NewDestReg; in ARMMaterializeGV()
2995 Register NewDestReg = createResultReg(TLI.getRegClassFor(VT)); in ARMLowerPICELF() local
2997 TII.get(ARM::t2LDRi12), NewDestReg) in ARMLowerPICELF()
3000 DestReg = NewDestReg; in ARMLowerPICELF()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUMachineCFGStructurizer.cpp | 66 void replaceDef(unsigned OldDestReg, unsigned NewDestReg);
206 void PHILinearize::replaceDef(unsigned OldDestReg, unsigned NewDestReg) { in replaceDef() argument
207 phiInfoElementSetDef(findPHIInfoElement(OldDestReg), NewDestReg); in replaceDef()
2397 Register NewDestReg = MRI->createVirtualRegister(RegClass); in splitLoopPHI() local
2398 LRegion->replaceRegisterInsideRegion(PHIDest, NewDestReg, false, MRI); in splitLoopPHI()
2401 TII->get(TargetOpcode::PHI), NewDestReg); in splitLoopPHI()
2402 LLVM_DEBUG(dbgs() << "Split Entry PHI " << printReg(NewDestReg, TRI) in splitLoopPHI()
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| H A D | SIInstrInfo.cpp | 959 MCRegister NewDestReg = RI.get32BitRegister(DestReg); in copyPhysReg() local
968 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), NewDestReg) in copyPhysReg()
979 copyPhysReg(MBB, MI, DL, NewDestReg, NewSrcReg, KillSrc); in copyPhysReg()
1008 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), NewDestReg) in copyPhysReg()
1013 auto MIB = BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_sdwa), NewDestReg) in copyPhysReg()
1022 .addReg(NewDestReg, RegState::Implicit | RegState::Undef); in copyPhysReg()
7603 Register NewDestReg = MRI.createVirtualRegister( in lowerSelect() local
7607 NewInst = BuildMI(MBB, MII, DL, get(AMDGPU::V_CNDMASK_B32_e64), NewDestReg) in lowerSelect()
7615 BuildMI(MBB, MII, DL, get(AMDGPU::V_CNDMASK_B64_PSEUDO), NewDestReg) in lowerSelect()
7620 MRI.replaceRegWith(Dest.getReg(), NewDestReg); in lowerSelect()
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