| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAddSub.cpp | 3018 Value *NegY = Builder.CreateFNegFMF(Y, &I, Y->getName() + ".neg"); in visitFNeg() local
3019 SelectInst *NewSel = SelectInst::Create(Cond, P, NegY); in visitFNeg()
3035 Value *NegY = Builder.CreateFNegFMF(Y, &I, Y->getName() + ".neg"); in visitFNeg() local
3036 SelectInst *NewSel = SelectInst::Create(Cond, NegX, NegY); in visitFNeg()
3048 Value *NegY = Builder.CreateFNegFMF(Y, FMF); in visitFNeg() local
3049 Value *NewCopySign = Builder.CreateCopySign(X, NegY, FMF); in visitFNeg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCodeGenPrepare.cpp | 1481 Value *NegY = Builder.CreateSub(Zero, Y); in expandDivRem32() local
1482 Value *NegYZ = Builder.CreateMul(NegY, Z); in expandDivRem32()
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| H A D | AMDGPULegalizerInfo.cpp | 4545 auto NegY = B.buildSub(S32, B.buildConstant(S32, 0), Y); in legalizeUnsignedDIV_REM32Impl() local
4546 auto NegYZ = B.buildMul(S32, NegY, Z); in legalizeUnsignedDIV_REM32Impl()
4912 auto NegY = B.buildFNeg(ResTy, Y); in legalizeFastUnsafeFDIV64() local
4919 auto Tmp0 = B.buildFMA(ResTy, NegY, R, One); in legalizeFastUnsafeFDIV64()
4922 auto Tmp1 = B.buildFMA(ResTy, NegY, R, One); in legalizeFastUnsafeFDIV64()
4926 auto Tmp2 = B.buildFMA(ResTy, NegY, Ret, X); in legalizeFastUnsafeFDIV64()
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| H A D | AMDGPUISelLowering.cpp | 2317 SDValue NegY = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), Y); in LowerUDIVREM() local
2318 SDValue NegYZ = DAG.getNode(ISD::MUL, DL, VT, NegY, Z); in LowerUDIVREM()
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| H A D | SIISelLowering.cpp | 11167 SDValue NegY = DAG.getNode(ISD::FNEG, SL, VT, Y); in lowerFastUnsafeFDIV64() local
11171 SDValue Tmp0 = DAG.getNode(ISD::FMA, SL, VT, NegY, R, One); in lowerFastUnsafeFDIV64()
11174 SDValue Tmp1 = DAG.getNode(ISD::FMA, SL, VT, NegY, R, One); in lowerFastUnsafeFDIV64()
11177 SDValue Tmp2 = DAG.getNode(ISD::FMA, SL, VT, NegY, Ret, X); in lowerFastUnsafeFDIV64()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 7568 SDValue NegY = in getNegatedExpression() local
7578 if (NegY != N) in getNegatedExpression()
7579 RemoveDeadNode(NegY); in getNegatedExpression()
7584 if (NegY) { in getNegatedExpression()
7586 SDValue N = DAG.getNode(ISD::FSUB, DL, VT, NegY, X, Flags); in getNegatedExpression()
7624 SDValue NegY = in getNegatedExpression() local
7634 if (NegY != N) in getNegatedExpression()
7635 RemoveDeadNode(NegY); in getNegatedExpression()
7645 if (NegY) { in getNegatedExpression()
7647 SDValue N = DAG.getNode(Opcode, DL, VT, X, NegY, Flags); in getNegatedExpression()
[all …]
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| H A D | DAGCombiner.cpp | 10594 SDValue NegY = DAG.getNegative(Y, DL, ShiftVT); in visitSHL() local
10596 DAG.getZExtOrTrunc(DAG.getNode(ISD::AND, DL, ShiftVT, Y, NegY), DL, VT); in visitSHL()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 6306 Register NegY = in matchCombineFSubFMulToFMadOrFMA() local
6309 {NegY, RHS.MI->getOperand(2).getReg(), LHS.Reg}); in matchCombineFSubFMulToFMadOrFMA()
6405 Register NegY = B.buildFNeg(DstTy, FpExtY).getReg(0); in matchCombineFSubFpExtFMulToFMadOrFMA() local
6409 {NegY, FpExtZ, LHSReg}); in matchCombineFSubFpExtFMulToFMadOrFMA()
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