Searched refs:NegOp1 (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineNegator.cpp | 351 Value *NegOp1 = negate(I->getOperand(1), IsNSW, Depth + 1); in visitImpl() local
352 if (!NegOp1) // Early return. in visitImpl()
358 return Builder.CreateSelect(I->getOperand(0), NegOp1, NegOp2, in visitImpl()
367 Value *NegOp1 = negate(I->getOperand(1), IsNSW, Depth + 1); in visitImpl() local
368 if (!NegOp1) in visitImpl()
370 return Builder.CreateShuffleVector(NegOp0, NegOp1, Shuf->getShuffleMask(), in visitImpl()
476 if (Value *NegOp1 = negate(Ops[1], /* IsNSW */ false, Depth + 1)) { in visitImpl() local
477 NegatedOp = NegOp1; in visitImpl()
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| H A D | InstCombineAddSub.cpp | 2322 if (Value *NegOp1 = Negator::Negate(IsNegation, /* IsNSW */ IsNegation && in visitSub() local
2325 return BinaryOperator::CreateAdd(NegOp1, Op0); in visitSub()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 8703 SDValue NegOp1 = Neg.getOperand(1); in matchRotateSub() local
8732 if ((Pos == NegOp1) || in matchRotateSub()
8733 (NegOp1.getOpcode() == ISD::TRUNCATE && Pos == NegOp1.getOperand(0))) in matchRotateSub()
8745 else if (Pos.getOpcode() == ISD::ADD && Pos.getOperand(0) == NegOp1) { in matchRotateSub()
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| H A D | TargetLowering.cpp | 8316 SDValue NegOp1 = DAG.getNode(ISD::SUB, DL, ShVT, Zero, Op1); in expandROT() local
8319 SDValue HsAmt = DAG.getNode(ISD::AND, DL, ShVT, NegOp1, BitWidthMinusOneC); in expandROT()
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