Searched refs:NegN0 (Results 1 – 2 of 2) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 16577 if (SDValue NegN0 = TLI.getCheaperNegatedExpression( in visitFADD() local 16579 return DAG.getNode(ISD::FSUB, DL, VT, N1, NegN0); in visitFADD() 16745 if (SDValue NegN0 = TLI.getCheaperNegatedExpression( in visitSTRICT_FADD() local 16748 {Chain, N1, NegN0}); in visitSTRICT_FADD() 17020 SDValue NegN0 = in visitFMUL() local 17022 if (NegN0) { in visitFMUL() 17023 HandleSDNode NegN0Handle(NegN0); in visitFMUL() 17028 return DAG.getNode(ISD::FMUL, DL, VT, NegN0, NegN1); in visitFMUL() 17116 SDValue NegN0 = in visitFMA() local 17118 if (NegN0) { in visitFMA() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 17676 SDValue NegN0 = getNegatedExpression(N0, DAG, LegalOps, OptForSize, in getNegatedExpression() local 17683 if (NegN0 && N0Cost <= N1Cost) { in getNegatedExpression() 17685 return DAG.getNode(Opc, Loc, VT, NegN0, N1, NegN2, Flags); in getNegatedExpression() 18144 if (SDValue NegN0 = getCheaperNegatedExpression(N0, DAG, LegalOps, CodeSize)) in combineFMALike() local 18145 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, NegN0, N1, N2, Flags); in combineFMALike()
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