Searched refs:NegLHS (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 4076 bool NegLHS = false; in tryEmitFMulAdd() local
4081 NegLHS = true; in tryEmitFMulAdd()
4099 (LHSBinOp->use_empty() || NegLHS)) { in tryEmitFMulAdd()
4101 if (NegLHS) in tryEmitFMulAdd()
4103 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, NegLHS, isSub); in tryEmitFMulAdd()
4119 (LHSBinOp->use_empty() || NegLHS)) { in tryEmitFMulAdd()
4121 if (NegLHS) in tryEmitFMulAdd()
4123 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, NegLHS, isSub); in tryEmitFMulAdd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4855 SDValue NegLHS = DAG.getNode(ISD::FNEG, SL, VT, LHS); in performFNegCombine() local
4859 SDValue Res = DAG.getNode(Opposite, SL, VT, NegLHS, NegRHS, N0->getFlags()); in performFNegCombine()
4993 SDValue NegLHS = DAG.getNode(ISD::FNEG, SL, MVT::f32, LHS); in performFNegCombine() local
4996 return DAG.getNode(ISD::SELECT, SL, MVT::f32, BCSrc.getOperand(0), NegLHS, in performFNegCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 7504 SDValue NegLHS = in getNegatedExpression() local
7506 if (!NegLHS || CostLHS > NegatibleCost::Neutral) { in getNegatedExpression()
7507 RemoveDeadNode(NegLHS); in getNegatedExpression()
7512 Handles.emplace_back(NegLHS); in getNegatedExpression()
7525 RemoveDeadNode(NegLHS); in getNegatedExpression()
7531 return DAG.getSelect(DL, VT, Op.getOperand(0), NegLHS, NegRHS); in getNegatedExpression()
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