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Searched refs:NegImm (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVGISel.td58 (SLTIU (ADDI GPR:$rs1, (NegImm simm12Plus1:$imm12)), 1)>;
63 (SLTU (XLenVT X0), (ADDI GPR:$rs1, (NegImm simm12Plus1:$imm12)))>;
H A DRISCVInstrInfo.td512 def NegImm : SDNodeXForm<imm, [{
517 GISDNodeXFormEquiv<NegImm>;
1662 (Select_GPR_Using_CC_GPR (XLenVT (ADDI GPR:$lhs, (NegImm simm12:$Constant))), (XLenVT X0),
1693 (Inst (XLenVT (ADDI GPR:$lhs, (NegImm simm12:$Constant))),
H A DRISCVInstrInfoVSDPatterns.td905 (NegImm simm5_plus1:$rs2), vti.AVL, vti.Log2SEW, TA_MA)>;
H A DRISCVInstrInfoVPseudos.td6231 (NegImm simm5_plus1:$rs2),
6243 (NegImm simm5_plus1:$rs2),
H A DRISCVInstrInfoVVLPatterns.td2117 (NegImm simm5_plus1:$rs2), (vti.Mask VMV0:$vm),
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.td521 def NegImm : SDNodeXForm<imm, [{
1475 (SLTUI (ADDI_W GPR:$rj, (NegImm simm12_plus1:$imm12)), 1)>;
1479 (SLTUI (ADDI_D GPR:$rj, (NegImm simm12_plus1:$imm12)), 1)>;
1485 (SLTU R0, (ADDI_W GPR:$rj, (NegImm simm12_plus1:$imm12)))>;
1489 (SLTU R0, (ADDI_D GPR:$rj, (NegImm simm12_plus1:$imm12)))>;
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp447 int64_t NegImm = -Imm.getSExtValue(); in getIntImmCostInst() local
448 if (ST->isThumb2() && NegImm < 1<<12) in getIntImmCostInst()
451 if (ST->isThumb() && NegImm < 1<<8) in getIntImmCostInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp594 uint32_t NegImm = (static_cast<uint32_t>(NegHi) << 16) | NegLo; in tryFoldImmWithOpSel() local
596 if (tryFoldToInline(NegImm)) { in tryFoldImmWithOpSel()