| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 5080 EVT NarrowVT = Node->getMemoryVT(); in lowerATOMIC_LOAD_OP() local
5082 if (NarrowVT == WideVT) in lowerATOMIC_LOAD_OP()
5085 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_LOAD_OP()
5121 NarrowVT, MMO); in lowerATOMIC_LOAD_OP()
5176 EVT NarrowVT = Node->getMemoryVT(); in lowerATOMIC_CMP_SWAP() local
5177 EVT WideVT = NarrowVT == MVT::i64 ? MVT::i64 : MVT::i32; in lowerATOMIC_CMP_SWAP()
5178 if (NarrowVT == WideVT) { in lowerATOMIC_CMP_SWAP()
5182 DL, Tys, Ops, NarrowVT, MMO); in lowerATOMIC_CMP_SWAP()
5194 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_CMP_SWAP()
5204 VTList, Ops, NarrowVT, MMO); in lowerATOMIC_CMP_SWAP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2533 EVT NarrowVT = Op.getValueType(); in LowerFP_ROUND() local
2536 if (NarrowVT.getScalarType() == MVT::bf16) { in LowerFP_ROUND()
2555 return DAG.getFPExtendOrRound(rod, Loc, NarrowVT); in LowerFP_ROUND()
2569 EVT NarrowVT = Narrow.getValueType(); in LowerFP_EXTEND() local
2571 if (NarrowVT.getScalarType() == MVT::bf16) { in LowerFP_EXTEND()
2579 EVT F32 = NarrowVT.isVector() ? NarrowVT.changeVectorElementType(MVT::f32) in LowerFP_EXTEND()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 10654 EVT NarrowVT = LeftOp.getOperand(0).getValueType(); in combineShiftToMULH() local
10655 unsigned NarrowVTSize = NarrowVT.getScalarSizeInBits(); in combineShiftToMULH()
10674 TLI.isOperationLegalOrCustom(MulLoHiOp, NarrowVT) && in combineShiftToMULH()
10687 Constant->getAPIntValue().trunc(NarrowVT.getScalarSizeInBits()), DL, in combineShiftToMULH()
10688 NarrowVT); in combineShiftToMULH()
10693 if (NarrowVT != RightOp.getOperand(0).getValueType()) in combineShiftToMULH()
10722 if (NarrowVT.isVector()) { in combineShiftToMULH()
10723 EVT TransformVT = TLI.getTypeToTransformTo(*DAG.getContext(), NarrowVT); in combineShiftToMULH()
10724 if (TransformVT.getVectorElementType() != NarrowVT.getVectorElementType() || in combineShiftToMULH()
10728 if (!TLI.isOperationLegalOrCustom(MulhOpcode, NarrowVT)) in combineShiftToMULH()
[all …]
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| H A D | LegalizeVectorTypes.cpp | 6539 EVT NarrowVT = ((ScalarBits0 < ScalarBits1) ? VT0 : VT1); in WidenVSELECTMask() local
6540 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTMask()
6543 else if (ScalarBits_ToMask <= NarrowVT.getScalarSizeInBits()) in WidenVSELECTMask()
6544 MaskVT = NarrowVT; in WidenVSELECTMask()
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| H A D | TargetLowering.cpp | 4185 EVT NarrowVT = EVT::getIntegerVT(*DAG.getContext(), in foldSetCCWithAnd() local
4187 if (isTruncateFree(OpVT, NarrowVT) && isTypeLegal(NarrowVT)) { in foldSetCCWithAnd()
4188 SDValue Trunc = DAG.getZExtOrTrunc(N0.getOperand(0), DL, NarrowVT); in foldSetCCWithAnd()
4189 SDValue Zero = DAG.getConstant(0, DL, NarrowVT); in foldSetCCWithAnd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1048 MVT NarrowVT = VT.getHalfNumVectorElementsVT(); in PreprocessISelDAG() local
1051 CurDAG->getNode(X86ISD::VBROADCAST, dl, NarrowVT, N->getOperand(0)); in PreprocessISelDAG()
1055 unsigned Index = NarrowVT.getVectorMinNumElements(); in PreprocessISelDAG()
1072 MVT NarrowVT = VT.getHalfNumVectorElementsVT(); in PreprocessISelDAG() local
1075 SDVTList VTs = CurDAG->getVTList(NarrowVT, MVT::Other); in PreprocessISelDAG()
1083 unsigned Index = NarrowVT.getVectorMinNumElements(); in PreprocessISelDAG()
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| H A D | X86ISelLowering.cpp | 9466 MVT NarrowVT = MVT::getVectorVT(EltVT, 4); in LowerBUILD_VECTOR() local
9469 DAG.getBuildVector(NarrowVT, dl, Ops)); in LowerBUILD_VECTOR()
50926 EVT NarrowVT = Narrow.getValueType(); in PromoteMaskArithmetic() local
50937 return DAG.getZeroExtendInReg(Op, DL, NarrowVT); in PromoteMaskArithmetic()
50940 Op, DAG.getValueType(NarrowVT)); in PromoteMaskArithmetic()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6092 MVT NarrowVT = in lowerVECTOR_SHUFFLE() local
6094 SDValue Src = DAG.getExtractSubvector(DL, NarrowVT, V1, 0); in lowerVECTOR_SHUFFLE()
15341 EVT NarrowVT = EVT::getVectorVT(C, ElemVT, VT.getVectorElementCount()); in combineBinOpOfZExt() local
15343 Src0 = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(Src0), NarrowVT, Src0); in combineBinOpOfZExt()
15344 Src1 = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(Src1), NarrowVT, Src1); in combineBinOpOfZExt()
15356 DAG.getNode(N->getOpcode(), SDLoc(N), NarrowVT, Src0, Src1)); in combineBinOpOfZExt()
16559 MVT NarrowVT = getNarrowType(Root, *SupportsExt); in getOrCreateExtendedOp() local
16563 if (Source.getValueType() == NarrowVT) in getOrCreateExtendedOp()
16577 return DAG.getNode(ExtOpc, DL, NarrowVT, Source, Mask, VL); in getOrCreateExtendedOp()
16579 return DAG.getSplat(NarrowVT, DL, Source.getOperand(0)); in getOrCreateExtendedOp()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2777 EVT NarrowVT = N->getOperand(0)->getValueType(0); in tryBitfieldExtractOpFromSExt() local
2778 if (VT != MVT::i64 || NarrowVT != MVT::i32) in tryBitfieldExtractOpFromSExt()
2790 unsigned Imms = NarrowVT.getSizeInBits() - 1; in tryBitfieldExtractOpFromSExt()
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| H A D | AArch64ISelLowering.cpp | 1081 for (MVT NarrowVT : MVT::fp_valuetypes()) { in AArch64TargetLowering() local
1082 if (WideVT.getScalarSizeInBits() > NarrowVT.getScalarSizeInBits()) { in AArch64TargetLowering()
1083 setTruncStoreAction(WideVT, NarrowVT, Expand); in AArch64TargetLowering()
15507 EVT NarrowVT = getPackedSVEVectorVT(VT.getVectorElementCount()); in LowerINSERT_SUBVECTOR() local
15512 Vec0 = getSVESafeBitCast(NarrowVT, Vec0, DAG); in LowerINSERT_SUBVECTOR()
15513 Vec1 = getSVESafeBitCast(NarrowVT, Vec1, DAG); in LowerINSERT_SUBVECTOR()
15517 Vec1 = DAG.getNode(AArch64ISD::NVCAST, DL, NarrowVT, Vec1); in LowerINSERT_SUBVECTOR()
15526 HiVec0 = DAG.getNode(AArch64ISD::NVCAST, DL, NarrowVT, HiVec0); in LowerINSERT_SUBVECTOR()
15527 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, Vec1, HiVec0); in LowerINSERT_SUBVECTOR()
15532 LoVec0 = DAG.getNode(AArch64ISD::NVCAST, DL, NarrowVT, LoVec0); in LowerINSERT_SUBVECTOR()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 12312 EVT NarrowVT = EVT::getIntegerVT(*DAG.getContext(), Bits); in performAndCombine() local
12314 DAG.getValueType(NarrowVT)); in performAndCombine()
12523 auto NarrowVT = NarrowOp.getValueType(); in calculateSrcByte() local
12526 NarrowVT = VTSign->getVT(); in calculateSrcByte()
12528 if (!NarrowVT.isByteSized()) in calculateSrcByte()
12530 uint64_t NarrowByteWidth = NarrowVT.getStoreSize(); in calculateSrcByte()
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