| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 4589 EVT NarrowVT = Node->getMemoryVT(); in lowerATOMIC_LOAD_OP() local
4591 if (NarrowVT == WideVT) in lowerATOMIC_LOAD_OP()
4594 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_LOAD_OP()
4629 NarrowVT, MMO); in lowerATOMIC_LOAD_OP()
4684 EVT NarrowVT = Node->getMemoryVT(); in lowerATOMIC_CMP_SWAP() local
4685 EVT WideVT = NarrowVT == MVT::i64 ? MVT::i64 : MVT::i32; in lowerATOMIC_CMP_SWAP()
4686 if (NarrowVT == WideVT) { in lowerATOMIC_CMP_SWAP()
4690 DL, Tys, Ops, NarrowVT, MMO); in lowerATOMIC_CMP_SWAP()
4702 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_CMP_SWAP()
4712 VTList, Ops, NarrowVT, MMO); in lowerATOMIC_CMP_SWAP()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2670 EVT NarrowVT = Op.getValueType(); in LowerFP_ROUND() local
2673 if (NarrowVT.getScalarType() == MVT::bf16) { in LowerFP_ROUND()
2692 return DAG.getFPExtendOrRound(rod, Loc, NarrowVT); in LowerFP_ROUND()
2706 EVT NarrowVT = Narrow.getValueType(); in LowerFP_EXTEND() local
2708 if (NarrowVT.getScalarType() == MVT::bf16) { in LowerFP_EXTEND()
2716 EVT F32 = NarrowVT.isVector() ? NarrowVT.changeVectorElementType(MVT::f32) in LowerFP_EXTEND()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 10199 EVT NarrowVT = LeftOp.getOperand(0).getValueType(); in combineShiftToMULH() local
10200 unsigned NarrowVTSize = NarrowVT.getScalarSizeInBits(); in combineShiftToMULH()
10219 TLI.isOperationLegalOrCustom(MulLoHiOp, NarrowVT) && in combineShiftToMULH()
10232 Constant->getAPIntValue().trunc(NarrowVT.getScalarSizeInBits()), DL, in combineShiftToMULH()
10233 NarrowVT); in combineShiftToMULH()
10238 if (NarrowVT != RightOp.getOperand(0).getValueType()) in combineShiftToMULH()
10267 if (NarrowVT.isVector()) { in combineShiftToMULH()
10268 EVT TransformVT = TLI.getTypeToTransformTo(*DAG.getContext(), NarrowVT); in combineShiftToMULH()
10269 if (TransformVT.getVectorElementType() != NarrowVT.getVectorElementType() || in combineShiftToMULH()
10273 if (!TLI.isOperationLegalOrCustom(MulhOpcode, NarrowVT)) in combineShiftToMULH()
[all …]
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| H A D | LegalizeVectorTypes.cpp | 6097 EVT NarrowVT = ((ScalarBits0 < ScalarBits1) ? VT0 : VT1); in WidenVSELECTMask()
6098 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTMask()
6101 else if (ScalarBits_ToMask <= NarrowVT.getScalarSizeInBits()) in WidenVSELECTMask()
6102 MaskVT = NarrowVT; in WidenVSELECTMask()
6093 EVT NarrowVT = ((ScalarBits0 < ScalarBits1) ? VT0 : VT1); WidenVSELECTMask() local
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| H A D | TargetLowering.cpp | 4009 EVT NarrowVT = EVT::getIntegerVT(*DAG.getContext(), in foldSetCCWithAnd() local
4011 if (isTruncateFree(OpVT, NarrowVT) && isTypeLegal(NarrowVT)) { in foldSetCCWithAnd()
4012 SDValue Trunc = DAG.getZExtOrTrunc(N0.getOperand(0), DL, NarrowVT); in foldSetCCWithAnd()
4013 SDValue Zero = DAG.getConstant(0, DL, NarrowVT); in foldSetCCWithAnd()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1004 MVT NarrowVT = VT.getHalfNumVectorElementsVT(); in PreprocessISelDAG() local
1007 CurDAG->getNode(X86ISD::VBROADCAST, dl, NarrowVT, N->getOperand(0)); in PreprocessISelDAG()
1011 unsigned Index = NarrowVT.getVectorMinNumElements(); in PreprocessISelDAG()
1028 MVT NarrowVT = VT.getHalfNumVectorElementsVT(); in PreprocessISelDAG() local
1031 SDVTList VTs = CurDAG->getVTList(NarrowVT, MVT::Other); in PreprocessISelDAG()
1039 unsigned Index = NarrowVT.getVectorMinNumElements(); in PreprocessISelDAG()
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| H A D | X86ISelLowering.cpp | 9065 MVT NarrowVT = MVT::getVectorVT(EltVT, 4); in LowerBUILD_VECTOR() local
9068 DAG.getBuildVector(NarrowVT, dl, Ops)); in LowerBUILD_VECTOR()
49169 EVT NarrowVT = Narrow.getValueType(); in PromoteMaskArithmetic() local
49180 return DAG.getZeroExtendInReg(Op, DL, NarrowVT); in PromoteMaskArithmetic()
49183 Op, DAG.getValueType(NarrowVT)); in PromoteMaskArithmetic()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 13382 EVT NarrowVT = EVT::getVectorVT(C, ElemVT, VT.getVectorElementCount()); in combineBinOpOfZExt()
13384 Src0 = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(Src0), NarrowVT, Src0); in combineBinOpOfZExt()
13385 Src1 = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(Src1), NarrowVT, Src1); in combineBinOpOfZExt()
13397 DAG.getNode(N->getOpcode(), SDLoc(N), NarrowVT, Src0, Src1));
14326 MVT NarrowVT = getNarrowType(Root, *SupportsExt); in getOrCreateExtendedOp()
14330 if (Source.getValueType() == NarrowVT) in getOrCreateExtendedOp()
14344 return DAG.getNode(ExtOpc, DL, NarrowVT, Source, Mask, VL); in getOrCreateExtendedOp()
14346 return DAG.getSplat(NarrowVT, DL, Source.getOperand(0)); in getOrCreateExtendedOp()
14348 return DAG.getNode(RISCVISD::VMV_V_X_VL, DL, NarrowVT, in getOrCreateExtendedOp()
14349 DAG.getUNDEF(NarrowVT), Sourc in getOrCreateExtendedOp()
13379 EVT NarrowVT = EVT::getVectorVT(C, ElemVT, VT.getVectorElementCount()); combineBinOpOfZExt() local
14323 MVT NarrowVT = getNarrowType(Root, *SupportsExt); getOrCreateExtendedOp() local
14378 MVT NarrowVT = MVT::getVectorVT(EltVT, VT.getVectorElementCount()); getNarrowType() local
14558 MVT NarrowVT = NarrowElt.getSimpleValueType(); fillUpExtensionSupport() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2677 EVT NarrowVT = N->getOperand(0)->getValueType(0); in tryBitfieldExtractOpFromSExt() local
2678 if (VT != MVT::i64 || NarrowVT != MVT::i32) in tryBitfieldExtractOpFromSExt()
2690 unsigned Imms = NarrowVT.getSizeInBits() - 1; in tryBitfieldExtractOpFromSExt()
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| H A D | AArch64ISelLowering.cpp | 1039 for (MVT NarrowVT : MVT::fp_valuetypes()) { in AArch64TargetLowering() local
1040 if (WideVT.getScalarSizeInBits() > NarrowVT.getScalarSizeInBits()) { in AArch64TargetLowering()
1041 setTruncStoreAction(WideVT, NarrowVT, Expand); in AArch64TargetLowering()
14607 EVT NarrowVT = getPackedSVEVectorVT(VT.getVectorElementCount()); in LowerINSERT_SUBVECTOR() local
14612 Vec0 = getSVESafeBitCast(NarrowVT, Vec0, DAG); in LowerINSERT_SUBVECTOR()
14625 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, Vec1, HiVec0); in LowerINSERT_SUBVECTOR()
14630 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, LoVec0, Vec1); in LowerINSERT_SUBVECTOR()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 11541 EVT NarrowVT = EVT::getIntegerVT(*DAG.getContext(), Bits); in performAndCombine() local
11543 DAG.getValueType(NarrowVT)); in performAndCombine()
11753 auto NarrowVT = NarrowOp.getValueType(); in calculateSrcByte() local
11756 NarrowVT = VTSign->getVT(); in calculateSrcByte()
11758 if (!NarrowVT.isByteSized()) in calculateSrcByte()
11760 uint64_t NarrowByteWidth = NarrowVT.getStoreSize(); in calculateSrcByte()
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