Searched refs:NIG_REG_XGXS_LANE_SEL_P0 (Results 1 – 2 of 2) sorted by relevance
832 #define NIG_REG_XGXS_LANE_SEL_P0 \ macro
2611 REG_WR(sc, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 1); in elink_emac_enable()2622 REG_WR(sc, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 1); in elink_emac_enable()2634 REG_WR(sc, NIG_REG_XGXS_LANE_SEL_P0 + port*4, ser_lane); in elink_emac_enable()3248 REG_WR(sc, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 0x0); in elink_bmac_enable()