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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp5561 ISD::CondCode N0CC; in isSaturatingMinMax() local
5567 N0CC = N0.getOpcode() == ISD::SMIN ? ISD::SETLT : ISD::SETGT; in isSaturatingMinMax()
5574 N0CC = cast<CondCodeSDNode>(N0.getOperand(4))->get(); in isSaturatingMinMax()
5584 N0CC = cast<CondCodeSDNode>(N0.getOperand(0).getOperand(2))->get(); in isSaturatingMinMax()
5590 unsigned Opcode1 = isSignedMinMax(N00, N01, N02, N03, N0CC); in isSaturatingMinMax()
5943 SDValue LL, LR, RL, RR, N0CC, N1CC; in foldLogicOfSetCCs() local
5944 if (!isSetCCEquivalent(N0, LL, LR, N0CC) || in foldLogicOfSetCCs()
5965 ISD::CondCode CC0 = cast<CondCodeSDNode>(N0CC)->get(); in foldLogicOfSetCCs()