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Searched refs:MxOp (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.td377 class MxOp<ValueType vt, MxSize size, string letter>
393 def Mxi8imm : MxOp<i8, MxSize8, "i">;
394 def Mxi16imm : MxOp<i16, MxSize16, "i">;
395 def Mxi32imm : MxOp<i32, MxSize32, "i">;
410 def MxMoveMask : MxOp<i16, MxSize16, "m"> {
660 // TODO: We can use MxOp<S>AddrMode_<AM> in more places to
664 def MxOp#size#AddrMode_d
668 def MxOp#size#AddrMode_j
672 def MxOp#size#AddrMode_o
676 def MxOp#size#AddrMode_e
[all …]
H A DM68kInstrData.td114 MxOpBundle DST = !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#DST_REG),
115 MxOpBundle SRC = !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#SRC_REG)>
138 MxOpBundle SRC = !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#SRC_REG)>
143 MxImmOpBundle SRC = !cast<MxImmOpBundle>("MxOp"#TYPE.Size#"AddrMode_i")>
152 : MxMove_MR<TYPE, !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#AM), REG,
161 : MxMove_MI<TYPE, !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#AM),
170 MxImmOpBundle SRC = !cast<MxImmOpBundle>("MxOp"#TYPE.Size#"AddrMode_i"),
171 MxOpBundle DST = !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#DST_REG)>
188 MxOpBundle DST = !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#DST_REG),
198 : MxMove_RM<TYPE, REG, !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#AM),
[all …]
H A DM68kInstrControl.td404 def MxTrapimm : MxOp<i8, MxSize8, "i">;
407 def MxBkptimm : MxOp<i8, MxSize8, "i">;
H A DM68kInstrArithmetic.td1057 : MxFUnary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
1100 : MxFBinary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp1061 auto RealCirc = [&](unsigned Opc, bool HasImm, unsigned MxOp) { in expandPostRAPseudo() argument
1062 Register Mx = MI.getOperand(MxOp).getReg(); in expandPostRAPseudo()