| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 68 unsigned MulOpc, unsigned AddSubOpc,
270 unsigned MulOpc, unsigned AddSubOpc, in ExpandFPMLxInstruction() argument
284 const MCInstrDesc &MCID1 = TII->get(MulOpc); in ExpandFPMLxInstruction()
354 unsigned MulOpc, AddSubOpc; in ExpandFPMLxInstructions() local
357 MulOpc, AddSubOpc, NegAcc, HasLane) || in ExpandFPMLxInstructions()
361 ExpandFPMLxInstruction(MBB, MI, MulOpc, AddSubOpc, NegAcc, HasLane); in ExpandFPMLxInstructions()
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| H A D | ARMBaseInstrInfo.h | 505 bool isFpMLxInstruction(unsigned Opcode, unsigned &MulOpc,
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| H A D | ARMBaseInstrInfo.cpp | 81 uint16_t MulOpc; // Expanded multiplication opcode member
117 MLxHazardOpcodes.insert(ARM_MLxTable[i].MulOpc); in ARMBaseInstrInfo()
4849 ARMBaseInstrInfo::isFpMLxInstruction(unsigned Opcode, unsigned &MulOpc, in isFpMLxInstruction() argument
4857 MulOpc = Entry.MulOpc; in isFpMLxInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6626 unsigned MulOpc, unsigned ZeroReg) { in canCombineWithMUL() argument
6627 return canCombine(MBB, MO, MulOpc, ZeroReg, true); in canCombineWithMUL()
6633 unsigned MulOpc) { in canCombineWithFMUL() argument
6634 return canCombine(MBB, MO, MulOpc); in canCombineWithFMUL()
7558 unsigned IdxDupOp, unsigned MulOpc, in genIndexedMultiply() argument
7584 MIB = BuildMI(MF, MIMetadata(Root), TII->get(MulOpc), ResultReg) in genIndexedMultiply()
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| H A D | AArch64TargetTransformInfo.cpp | 2136 template <Intrinsic::ID MulOpc, typename Intrinsic::ID FuseOpc>
2150 if (!match(Mul, m_Intrinsic<MulOpc>(m_Specific(P), m_Value(MulOp0), in instCombineSVEVectorFuseMulAddSub()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanTransforms.cpp | 2751 unsigned MulOpc = in convertToConcreteRecipes() local
2754 MulOpc, {VectorStep, ScalarStep}, Flags, R.getDebugLoc()); in convertToConcreteRecipes()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 2633 unsigned MulOpc = in widenScalarMulo() local
2638 Mulo = MIRBuilder.buildInstr(MulOpc, {WideTy, OverflowTy}, in widenScalarMulo()
2641 Mulo = MIRBuilder.buildInstr(MulOpc, {WideTy}, {LeftOperand, RightOperand}); in widenScalarMulo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4465 unsigned MulOpc = Signed ? AMDGPUISD::MUL_I24 : AMDGPUISD::MUL_U24; in getMul24() local
4466 return DAG.getNode(MulOpc, SL, MVT::i32, N0, N1); in getMul24()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 29761 unsigned MulOpc = IsSigned ? ISD::MULHS : ISD::MUL; in LowervXi8MulWithUNPCK() local
29762 SDValue RLo = DAG.getNode(MulOpc, dl, ExVT, ALo, BLo); in LowervXi8MulWithUNPCK()
29763 SDValue RHi = DAG.getNode(MulOpc, dl, ExVT, AHi, BHi); in LowervXi8MulWithUNPCK()
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