Searched refs:MoveReg (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 164 MoveReg, enumerator
286 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 420 Register MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToFPReg() local
422 TII.get(ARM::VMOVSR), MoveReg) in ARMMoveToFPReg()
424 return MoveReg; in ARMMoveToFPReg()
431 Register MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToIntReg() local
433 TII.get(ARM::VMOVRS), MoveReg) in ARMMoveToIntReg()
435 return MoveReg; in ARMMoveToIntReg()
1033 Register MoveReg = createResultReg(TLI.getRegClassFor(MVT::f32)); in ARMEmitLoad() local
1035 TII.get(ARM::VMOVSR), MoveReg) in ARMEmitLoad()
1037 ResultReg = MoveReg; in ARMEmitLoad()
1142 Register MoveReg = createResultReg(TLI.getRegClassFor(MVT::i32)); in ARMEmitStore() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 194 Register MoveReg = MRI.createVirtualRegister(&PPC::VSFRCRegClass); in selectIntToFP() local
197 BuildMI(MBB, I, DbgLoc, TII.get(PPC::MTVSRD), MoveReg).addReg(SrcReg); in selectIntToFP()
205 BuildMI(MBB, I, DbgLoc, TII.get(ConvOp), DstReg).addReg(MoveReg); in selectIntToFP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 2541 unsigned MoveReg = PPC::R12; in restoreCRs() local
2545 addFrameReference(BuildMI(*MF, DL, TII.get(PPC::LWZ), MoveReg), in restoreCRs()
2551 .addReg(MoveReg, getKillRegState(!CR3Spilled && !CR4Spilled))); in restoreCRs()
2555 .addReg(MoveReg, getKillRegState(!CR4Spilled))); in restoreCRs()
2559 .addReg(MoveReg, getKillRegState(true))); in restoreCRs()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1030 return hasProperty(MCID::MoveReg, Type);
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