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Searched refs:MayLoad (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/
H A DInstruction.h523 bool MayLoad : 1; variable
578 bool isMemOp() const { return MayLoad || MayStore; } in isMemOp()
581 void setMayLoad(bool newVal) { MayLoad = newVal; } in setMayLoad()
588 bool getMayLoad() const { return MayLoad; } in getMayLoad()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h168 MayLoad, enumerator
438 bool mayLoad() const { return Flags & (1ULL << MCID::MayLoad); } in mayLoad()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16InstrInfo.td515 class MayLoad {
790 def LbRxRyOffMemX16: FEXT_RRI16_mem_ins<0b10011, "lb", mem16, II_LB>, MayLoad{
800 FEXT_RRI16_mem_ins<0b10100, "lbu", mem16, II_LBU>, MayLoad {
809 def LhRxRyOffMemX16: FEXT_RRI16_mem_ins<0b10100, "lh", mem16, II_LH>, MayLoad{
819 FEXT_RRI16_mem_ins<0b10100, "lhu", mem16, II_LHU>, MayLoad {
846 def LwRxRyOffMemX16: FEXT_RRI16_mem_ins<0b10011, "lw", mem16, II_LW>, MayLoad{
855 def LwRxSpImmX16: FEXT_RRI16_mem_ins<0b10010, "lw", mem16sp, II_LW>, MayLoad;
857 def LwRxPcTcp16: FRI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
859 def LwRxPcTcpX16: FEXT_RI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
969 "", [], II_RESTORE >, MayLoad {
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LoadStoreOptimizer.cpp1691 bool MayLoad = FirstMI.mayLoad(); in findMatchingInsn() local
1848 const bool SameLoadReg = MayLoad && TRI->isSuperOrSubRegisterEq( in findMatchingInsn()
1897 MayLoad && !UsedRegUnits.available(getLdStRegOp(FirstMI).getReg())); in findMatchingInsn()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstr.h1142 return hasProperty(MCID::MayLoad, Type);
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPatterns.td3364 // because the SDNode ISD::PREFETCH has properties MayLoad and MayStore.