Searched refs:MaxReg (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNNSAReassign.cpp | 154 unsigned MaxReg = MaxNumVGPRs - NumRegs + AMDGPU::VGPR0; in scavengeRegs() local
156 for (unsigned Reg = AMDGPU::VGPR0; Reg <= MaxReg; ++Reg) { in scavengeRegs()
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ARMWinEHPrinter.cpp | 932 int MaxReg = 0x1F; in opcode_save_any_reg() local
934 --MaxReg; in opcode_save_any_reg()
936 --MaxReg; in opcode_save_any_reg()
937 if ((OC[Offset + 1] & 0x80) == 0x80 || RegKind == 3 || Reg > MaxReg) { in opcode_save_any_reg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 360 MCRegister MaxReg; in getLibCallID() local
365 MaxReg = std::max(MaxReg.id(), CS.getReg().id()); in getLibCallID()
367 if (!MaxReg) in getLibCallID()
370 switch (MaxReg.id()) { in getLibCallID()
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| H A D | RISCVISelLowering.cpp | 21843 Register MaxReg = MI.getOperand(2).getReg(); in emitFROUND() local
21855 BuildMI(MBB, DL, TII.get(CmpOpc), CmpReg).addReg(FabsReg).addReg(MaxReg); in emitFROUND()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 1178 static const char *getSpillFunctionFor(Register MaxReg, SpillKind SpillType, in getSpillFunctionFor() argument
1230 switch (MaxReg) { in getSpillFunctionFor()
1361 Register MaxReg = getMaxCalleeSavedReg(CSI, HRI); in insertCSRSpillsInBlock() local
1363 const char *SpillFun = getSpillFunctionFor(MaxReg, SK_ToMem, in insertCSRSpillsInBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1823 unsigned MaxReg = PermitsD32(Inst, Decoder) ? 32 : 16; in DecodeDPRRegListOperand() local
1824 if (regs == 0 || (Vd + regs) > MaxReg) { in DecodeDPRRegListOperand()
1825 regs = Vd + regs > MaxReg ? MaxReg - Vd : regs; in DecodeDPRRegListOperand()
1827 regs = std::min(MaxReg, regs); in DecodeDPRRegListOperand()
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