| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 201 PreferredTuple &MatchInfo) const; 203 PreferredTuple &MatchInfo) const; 207 BuildFnTy &MatchInfo) const; 212 BuildFnTy &MatchInfo) const; 215 IndexedLoadStoreMatchInfo &MatchInfo) const; 217 IndexedLoadStoreMatchInfo &MatchInfo) const; 224 std::tuple<Register, unsigned> &MatchInfo) const; 226 std::tuple<Register, unsigned> &MatchInfo) const; 323 bool matchPtrAddImmedChain(MachineInstr &MI, PtrAddChain &MatchInfo) const; 324 void applyPtrAddImmedChain(MachineInstr &MI, PtrAddChain &MatchInfo) const; [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCombinerHelper.cpp | 200 MachineInstr *&MatchInfo) const { in matchFoldableFneg() 202 MatchInfo = MRI.getVRegDef(Src); in matchFoldableFneg() 212 if (fnegFoldsIntoMI(*MatchInfo) && in matchFoldableFneg() 214 !allUsesHaveSourceMods(*MatchInfo, MRI))) in matchFoldableFneg() 218 switch (MatchInfo->getOpcode()) { in matchFoldableFneg() 228 return !isConstantCostlierToNegate(*MatchInfo, in matchFoldableFneg() 229 MatchInfo->getOperand(2).getReg(), MRI); in matchFoldableFneg() 234 return mayIgnoreSignedZero(*MatchInfo); in matchFoldableFneg() 249 Intrinsic::ID IntrinsicID = cast<GIntrinsic>(MatchInfo)->getIntrinsicID(); in matchFoldableFneg() 258 return mayIgnoreSignedZero(*MatchInfo); in matchFoldableFneg() [all …]
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| H A D | AMDGPUPreLegalizerCombiner.cpp | 71 ClampI64ToI16MatchInfo &MatchInfo) const; 74 const ClampI64ToI16MatchInfo &MatchInfo) const; 117 ClampI64ToI16MatchInfo &MatchInfo) const { in matchClampI64ToI16() 131 auto IsApplicableForCombine = [&MatchInfo]() -> bool { in matchClampI64ToI16() 132 const auto Cmp1 = MatchInfo.Cmp1; in matchClampI64ToI16() 133 const auto Cmp2 = MatchInfo.Cmp2; in matchClampI64ToI16() 151 m_GSMin(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) { in matchClampI64ToI16() 153 m_GSMax(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) { in matchClampI64ToI16() 159 m_GSMax(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) { in matchClampI64ToI16() 161 m_GSMin(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) { in matchClampI64ToI16() [all …]
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| H A D | AMDGPUPostLegalizerCombiner.cpp | 83 std::function<void(MachineIRBuilder &)> &MatchInfo) const; 96 CvtF32UByteMatchInfo &MatchInfo) const; 98 const CvtF32UByteMatchInfo &MatchInfo) const; 105 MachineInstr &MI, std::pair<MachineInstr *, unsigned> &MatchInfo) const; 107 MachineInstr &MI, std::pair<MachineInstr *, unsigned> &MatchInfo) const; 252 std::function<void(MachineIRBuilder &)> &MatchInfo) const { in matchRcpSqrtToRsq() 277 MatchInfo = [SqrtSrcMI, &MI](MachineIRBuilder &B) { in matchRcpSqrtToRsq() 287 MatchInfo = [RcpSrcMI, &MI](MachineIRBuilder &B) { in matchRcpSqrtToRsq() 318 MachineInstr &MI, CvtF32UByteMatchInfo &MatchInfo) const { in matchCvtF32UByteN() 336 MatchInfo.CvtVal = Src0; in matchCvtF32UByteN() [all …]
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| H A D | AMDGPURegBankCombiner.cpp | 83 bool matchIntMinMaxToMed3(MachineInstr &MI, Med3MatchInfo &MatchInfo) const; 84 bool matchFPMinMaxToMed3(MachineInstr &MI, Med3MatchInfo &MatchInfo) const; 87 void applyMed3(MachineInstr &MI, Med3MatchInfo &MatchInfo) const; 193 MachineInstr &MI, Med3MatchInfo &MatchInfo) const { in matchIntMinMaxToMed3() 215 MatchInfo = {OpcodeTriple.Med, Val, K0->VReg, K1->VReg}; in matchIntMinMaxToMed3() 238 MachineInstr &MI, Med3MatchInfo &MatchInfo) const { in matchFPMinMaxToMed3() 268 MatchInfo = {OpcodeTriple.Med, Val, K0->VReg, K1->VReg}; in matchFPMinMaxToMed3() 359 Med3MatchInfo &MatchInfo) const { in applyMed3() 360 B.buildInstr(MatchInfo.Opc, {MI.getOperand(0)}, in applyMed3() 361 {getAsVgpr(MatchInfo.Val0), getAsVgpr(MatchInfo.Val1), in applyMed3() [all …]
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| H A D | AMDGPUCombinerHelper.h | 35 bool matchFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo) const; 36 void applyFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo) const; 45 std::function<void(MachineIRBuilder &)> &MatchInfo) const;
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelperCasts.cpp | 29 BuildFnTy &MatchInfo) const { in matchSextOfTrunc() 51 MatchInfo = [=](MachineIRBuilder &B) { in matchSextOfTrunc() 60 MatchInfo = [=](MachineIRBuilder &B) { B.buildCopy(Dst, Src); }; in matchSextOfTrunc() 66 MatchInfo = [=](MachineIRBuilder &B) { in matchSextOfTrunc() 74 MatchInfo = [=](MachineIRBuilder &B) { B.buildSExt(Dst, Src); }; in matchSextOfTrunc() 82 BuildFnTy &MatchInfo) const { in matchZextOfTrunc() 93 MatchInfo = [=](MachineIRBuilder &B) { B.buildCopy(Dst, Src); }; in matchZextOfTrunc() 99 MatchInfo = [=](MachineIRBuilder &B) { in matchZextOfTrunc() 107 MatchInfo = [=](MachineIRBuilder &B) { in matchZextOfTrunc() 117 BuildFnTy &MatchInfo) const { in matchNonNegZext() [all …]
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| H A D | CombinerHelperVectorOps.cpp | 34 BuildFnTy &MatchInfo) const { in matchExtractVectorElement() 84 MatchInfo = [=](MachineIRBuilder &B) { B.buildUndef(Dst); }; in matchExtractVectorElement() 92 const MachineOperand &MO, BuildFnTy &MatchInfo) const { in matchExtractVectorElementWithDifferentIndices() 139 MatchInfo = [=](MachineIRBuilder &B) { in matchExtractVectorElementWithDifferentIndices() 150 BuildFnTy &MatchInfo) const { in matchExtractVectorElementWithBuildVector() 181 MatchInfo = [=](MachineIRBuilder &B) { in matchExtractVectorElementWithBuildVector() 189 const MachineOperand &MO, BuildFnTy &MatchInfo) const { in matchExtractVectorElementWithBuildVectorTrunc() 248 MatchInfo = [=](MachineIRBuilder &B) { in matchExtractVectorElementWithBuildVectorTrunc() 257 BuildFnTy &MatchInfo) const { in matchExtractVectorElementWithShuffleVector() 305 MatchInfo = [=](MachineIRBuilder &B) { B.buildUndef(Dst); }; in matchExtractVectorElementWithShuffleVector() [all …]
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| H A D | CombinerHelperCompares.cpp | 32 BuildFnTy &MatchInfo) const { in constantFoldICmp() 48 MatchInfo = [=](MachineIRBuilder &B) { in constantFoldICmp() 63 BuildFnTy &MatchInfo) const { in constantFoldFCmp() 79 MatchInfo = [=](MachineIRBuilder &B) { in constantFoldFCmp() 92 BuildFnTy &MatchInfo) const { in matchCanonicalizeICmp() 103 return constantFoldICmp(*Cmp, *CLHS, *CRHS, MatchInfo); in matchCanonicalizeICmp() 109 MatchInfo = [=](MachineIRBuilder &B) { B.buildICmp(Pred, Dst, LHS, RHS); }; in matchCanonicalizeICmp() 117 BuildFnTy &MatchInfo) const { in matchCanonicalizeFCmp() 129 return constantFoldFCmp(*Cmp, *CLHS, *CRHS, MatchInfo); in matchCanonicalizeFCmp() 135 MatchInfo = [=](MachineIRBuilder &B) { in matchCanonicalizeFCmp()
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| H A D | CombinerHelper.cpp | 245 MachineInstr &MI, BuildFnTy &MatchInfo) const { in matchFreezeOfSingleMaybePoisonOperand() 288 MatchInfo = [=](MachineIRBuilder &B) { in matchFreezeOfSingleMaybePoisonOperand() 300 MatchInfo = [=](MachineIRBuilder &B) mutable { in matchFreezeOfSingleMaybePoisonOperand() 952 BuildFnTy &MatchInfo) const { in matchCombineLoadWithAndMask() 1022 MatchInfo = [=](MachineIRBuilder &B) { in matchCombineLoadWithAndMask() 1095 MachineInstr &MI, std::tuple<Register, unsigned> &MatchInfo) const { in matchSextInRegOfLoad() 1142 MatchInfo = std::make_tuple(LoadDef->getDstReg(), NewSizeBits); in matchSextInRegOfLoad() 1147 MachineInstr &MI, std::tuple<Register, unsigned> &MatchInfo) const { in applySextInRegOfLoad() 1151 std::tie(LoadReg, ScalarSizeBits) = MatchInfo; in applySextInRegOfLoad() 1389 MachineInstr &MI, BuildFnTy &MatchInfo) const { in matchCombineExtractedVectorLoad() [all …]
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| H A D | CombinerHelperArtifacts.cpp | 31 BuildFnTy &MatchInfo) const { in matchMergeXAndUndef() 53 MatchInfo = [=](MachineIRBuilder &B) { in matchMergeXAndUndef() 60 BuildFnTy &MatchInfo) const { in matchMergeXAndZero() 81 MatchInfo = [=](MachineIRBuilder &B) { in matchMergeXAndZero()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 68 std::tuple<unsigned, LLT, Register> &MatchInfo) { in matchExtractVecEltPairwiseAdd() argument 101 std::get<0>(MatchInfo) = TargetOpcode::G_FADD; in matchExtractVecEltPairwiseAdd() 102 std::get<1>(MatchInfo) = DstTy; in matchExtractVecEltPairwiseAdd() 103 std::get<2>(MatchInfo) = Other->getOperand(0).getReg(); in matchExtractVecEltPairwiseAdd() 111 std::tuple<unsigned, LLT, Register> &MatchInfo) { in applyExtractVecEltPairwiseAdd() argument 112 unsigned Opc = std::get<0>(MatchInfo); in applyExtractVecEltPairwiseAdd() 115 LLT Ty = std::get<1>(MatchInfo); in applyExtractVecEltPairwiseAdd() 116 Register Src = std::get<2>(MatchInfo); in applyExtractVecEltPairwiseAdd() 346 std::tuple<Register, Register, Register> &MatchInfo) { in matchOrToBSP() argument 372 MatchInfo = {AO1, AO2, BVO1}; in matchOrToBSP() [all …]
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| H A D | AArch64PostLegalizerLowering.cpp | 154 ShuffleVectorPseudo &MatchInfo) { in matchREV() argument 179 MatchInfo = ShuffleVectorPseudo(Opcode, Dst, {Src}); in matchREV() 190 ShuffleVectorPseudo &MatchInfo) { in matchTRN() argument 201 MatchInfo = ShuffleVectorPseudo(Opc, Dst, {V1, V2}); in matchTRN() 211 ShuffleVectorPseudo &MatchInfo) { in matchUZP() argument 222 MatchInfo = ShuffleVectorPseudo(Opc, Dst, {V1, V2}); in matchUZP() 227 ShuffleVectorPseudo &MatchInfo) { in matchZip() argument 238 MatchInfo = ShuffleVectorPseudo(Opc, Dst, {V1, V2}); in matchZip() 245 ShuffleVectorPseudo &MatchInfo) { in matchDupFromInsertVectorElt() argument 277 MatchInfo = ShuffleVectorPseudo(AArch64::G_DUP, MI.getOperand(0).getReg(), in matchDupFromInsertVectorElt() [all …]
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| H A D | AArch64PreLegalizerCombiner.cpp | 76 GISelValueTracking *VT, Register &MatchInfo) { in matchICmpRedundantTrunc() argument 100 MatchInfo = WideReg; in matchICmpRedundantTrunc() 126 std::pair<uint64_t, uint64_t> &MatchInfo) { in matchFoldGlobalOffset() argument 188 MatchInfo = std::make_pair(NewOffset, MinOffset); in matchFoldGlobalOffset() 194 std::pair<uint64_t, uint64_t> &MatchInfo) { in applyFoldGlobalOffset() argument 216 std::tie(Offset, MinOffset) = MatchInfo; in applyFoldGlobalOffset() 236 std::tuple<Register, Register, bool> &MatchInfo) { in matchExtAddvToUdotAddv() argument 268 std::get<0>(MatchInfo) = ExtMI1->getOperand(1).getReg(); in matchExtAddvToUdotAddv() 269 std::get<1>(MatchInfo) = ExtMI2->getOperand(1).getReg(); in matchExtAddvToUdotAddv() 272 std::get<0>(MatchInfo) = I1->getOperand(1).getReg(); in matchExtAddvToUdotAddv() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/LogicalView/Core/ |
| H A D | LVOptions.cpp | 507 bool LVPatterns::matchPattern(StringRef Input, const LVMatchInfo &MatchInfo) { in matchPattern() argument 513 for (const LVMatch &Match : MatchInfo) { in matchPattern()
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| /freebsd/contrib/llvm-project/llvm/lib/FileCheck/ |
| H A D | FileCheck.cpp | 1183 SmallVector<StringRef, 4> MatchInfo; in match() local 1187 if (!Regex(RegExToMatch, Flags).match(Buffer, &MatchInfo)) in match() 1191 assert(!MatchInfo.empty() && "Didn't get any match"); in match() 1192 StringRef FullMatch = MatchInfo[0]; in match() 1196 assert(VariableDef.second < MatchInfo.size() && "Internal paren error"); in match() 1198 MatchInfo[VariableDef.second]; in match() 1214 assert(CaptureParenGroup < MatchInfo.size() && "Internal paren error"); in match() 1218 StringRef MatchedValue = MatchInfo[CaptureParenGroup]; in match()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/LogicalView/Core/ |
| H A D | LVOptions.h | 600 LLVM_ABI bool matchPattern(StringRef Input, const LVMatchInfo &MatchInfo);
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| /freebsd/contrib/sqlite3/ |
| H A D | sqlite3.c | 210249 typedef struct MatchInfo MatchInfo; typedef 210250 struct MatchInfo { struct 211031 MatchInfo *p /* Matchinfo context */ 211069 MatchInfo *p 211116 MatchInfo *p = (MatchInfo *)pCtx; 211133 MatchInfo *p = (MatchInfo *)pCtx; 211171 static size_t fts3MatchinfoSize(MatchInfo *pInfo, char cArg){ 211307 static int fts3MatchinfoLcs(Fts3Cursor *pCsr, MatchInfo *pInfo){ 211398 MatchInfo *pInfo, /* Matchinfo context object */ 211522 MatchInfo sInfo; [all …]
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