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Searched refs:MaskedValueIsZero (Results 1 – 25 of 43) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreSelectionDAGInfo.cpp33 DAG.MaskedValueIsZero(Size, APInt(SizeBitWidth, 3))) { in EmitTargetCodeForMemcpy()
H A DXCoreISelLowering.cpp623 if (DAG.MaskedValueIsZero(Mul.getOperand(0), HighMask) && in TryExpandADDWithMul()
624 DAG.MaskedValueIsZero(Mul.getOperand(1), HighMask)) { in TryExpandADDWithMul()
1633 DAG.MaskedValueIsZero(Mul0, HighMask) && in PerformDAGCombine()
1634 DAG.MaskedValueIsZero(Mul1, HighMask) && in PerformDAGCombine()
1635 DAG.MaskedValueIsZero(Addend0, HighMask) && in PerformDAGCombine()
1636 DAG.MaskedValueIsZero(Addend1, HighMask)) { in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/InstCombine/
H A DInstCombiner.h450 bool MaskedValueIsZero(const Value *V, const APInt &Mask,
453 return llvm::MaskedValueIsZero(V, Mask, SQ.getWithInstruction(CxtI), Depth);
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp298 if (IC.MaskedValueIsZero(I->getOperand(0), Mask, I) && in canEvaluateTruncated()
299 IC.MaskedValueIsZero(I->getOperand(1), Mask, I)) { in canEvaluateTruncated()
336 if (IC.MaskedValueIsZero(I->getOperand(0), ShiftedBits, CxtI)) in canEvaluateTruncated()
560 if (ShVal0 == ShVal1 || MaskedValueIsZero(L, HiBitMask)) in narrowFunnelShift()
598 if (!MaskedValueIsZero(ShVal1, HiBitMask, &Trunc)) in narrowFunnelShift()
962 MaskedValueIsZero(Src, APInt::getBitsSetFrom(SrcWidth, DestWidth), in visitTrunc()
1113 if (IC.MaskedValueIsZero(I->getOperand(1), in canEvaluateZExtd()
1235 if (MaskedValueIsZero( in visitZExt()
H A DInstCombineShifts.cpp570 if (IC.MaskedValueIsZero(InnerShift->getOperand(0), Mask, CxtI)) in canEvaluateShiftedShift()
1071 MaskedValueIsZero(X, APInt::getHighBitsSet(SrcWidth, ShAmtC), &I)) in visitShl()
1832 if (MaskedValueIsZero(Op0, APInt::getSignMask(BitWidth), &I)) { in visitAShr()
H A DInstCombineAndOrXor.cpp2574 if (MaskedValueIsZero(X, NotAndMask, &I)) { in visitAnd()
2580 if (!isa<Constant>(Y) && MaskedValueIsZero(Y, NotAndMask, &I)) { in visitAnd()
3836 !CV->isAllOnes() && MaskedValueIsZero(Y, *CV, &I)) { in visitOr()
3880 MaskedValueIsZero(X, ~*C0, &I)) { in visitOr()
3887 MaskedValueIsZero(X, ~*C1, &I)) { in visitOr()
5018 MaskedValueIsZero(X, *C, &I)) in visitXor()
H A DInstCombineMulDivRem.cpp2506 if (MaskedValueIsZero(Op1, Mask, &I) && MaskedValueIsZero(Op0, Mask, &I)) { in visitSRem()
H A DInstCombineAddSub.cpp969 MaskedValueIsZero(X, APInt::getHighBitsSet(BitWidth, ShAmt), &Add)) { in foldAddWithConstant()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGAddressAnalysis.cpp227 if (DAG.MaskedValueIsZero(Base->getOperand(0), C->getAPIntValue())) { in matchLSNode()
H A DDAGCombiner.cpp3864 if (!DAG.MaskedValueIsZero(LHS, UpperBits)) in getTruncatedUSUBSAT()
4122 if (DAG.MaskedValueIsZero(N1, ~APInt::getSignMask(BitWidth))) { in visitSUB()
6782 if (DAG.MaskedValueIsZero(N0.getOperand(1), Mask)) { in visitANDLike()
7434 if (N1C && DAG.MaskedValueIsZero(SDValue(N, 0), APInt::getAllOnes(BitWidth))) in visitAND()
7468 if (DAG.MaskedValueIsZero(N0Op0, Mask)) in visitAND()
7748 if (DAG.MaskedValueIsZero(N1, ExtBits) && in visitAND()
7916 if (!DAG.MaskedValueIsZero(N10, in MatchBSwapHWordLow()
8174 if (DAG.MaskedValueIsZero(N0.getOperand(0), RHSMask&~LHSMask) && in visitORLike()
8175 DAG.MaskedValueIsZero(N1.getOperand(0), LHSMask&~RHSMask)) { in visitORLike()
8399 if (N1C && DAG.MaskedValueIsZero(N0, ~N1C->getAPIntValue())) in visitOR()
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H A DTargetLowering.cpp2031 TLO.DAG.MaskedValueIsZero(Op0, HiBits))) { in SimplifyDemandedBits()
4171 if (DAG.MaskedValueIsZero(N0, UpperBits)) in foldSetCCWithAnd()
5018 DAG.MaskedValueIsZero( in SimplifySetCC()
5041 if (DAG.MaskedValueIsZero(N0, in SimplifySetCC()
5250 DAG.MaskedValueIsZero(LHS, HiBits)) { in SimplifySetCC()
5258 DAG.MaskedValueIsZero(RHS, HiBits)) { in SimplifySetCC()
7817 if (DAG.MaskedValueIsZero(LHS, HighMask) && in expandMUL_LOHI()
7818 DAG.MaskedValueIsZero(RHS, HighMask)) { in expandMUL_LOHI()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMVETailPredication.cpp357 if (MaskedValueIsZero(BaseV->getValue(), Mask, in IsSafeActiveMask()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelDAGToDAG.cpp406 CurDAG->MaskedValueIsZero(N->getOperand(0), CN->getAPIntValue()); in SelectAddrOperands()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp235 CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getAPIntValue())) { in MatchAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp360 if (CurDAG->MaskedValueIsZero(N, Mask)) { in selectZExti32()
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DValueTracking.h196 LLVM_ABI bool MaskedValueIsZero(const Value *V, const APInt &Mask,
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperators.td809 return CurDAG->MaskedValueIsZero(N->getOperand(0),
817 return CurDAG->MaskedValueIsZero(N->getOperand(1),
/freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp345 return MaskedValueIsZero(cast<Instruction>(SubOp1)->getOperand(0), in tryToRecognizePopCount()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h2053 LLVM_ABI bool MaskedValueIsZero(SDValue Op, const APInt &Mask,
2059 LLVM_ABI bool MaskedValueIsZero(SDValue Op, const APInt &Mask,
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFragments.td735 return CurDAG->MaskedValueIsZero(N->getOperand(0), CN->getAPIntValue());
H A DX86ISelDAGToDAG.cpp2287 if (!DAG.MaskedValueIsZero(X, MaskedHighBits)) in foldMaskAndShiftToScale()
2484 CurDAG->MaskedValueIsZero(ShVal, HiBits))) { in matchIndexRecursively()
2822 !CurDAG->MaskedValueIsZero(ShlSrc, HighZeros & Mask)) in matchAddressRecursively()
4565 if (CurDAG->MaskedValueIsZero(N->getOperand(0), NeededMask)) in tryShrinkShlLogicImm()
H A DX86ISelLowering.cpp6436 !DAG.MaskedValueIsZero(N0, ZeroMask, EltsLHS, Depth + 1)) || in getFauxShuffleMask()
6438 !DAG.MaskedValueIsZero(N1, ZeroMask, EltsRHS, Depth + 1))) in getFauxShuffleMask()
10874 if ((N1.isUndef() || IsZero1 || DAG.MaskedValueIsZero(N1, ZeroMask)) && in matchShuffleWithPACK()
10875 (N2.isUndef() || IsZero2 || DAG.MaskedValueIsZero(N2, ZeroMask))) { in matchShuffleWithPACK()
22734 DAG.MaskedValueIsZero(BitNo, APInt(BitNo.getValueSizeInBits(), 32))) in getBT()
23488 DAG.MaskedValueIsZero(Op1, APInt::getHighBitsSet(64, 32)) && in EmitCmp()
23489 DAG.MaskedValueIsZero(Op0, APInt::getHighBitsSet(64, 32))) { in EmitCmp()
24813 return DAG.MaskedValueIsZero(VOp0, APInt::getHighBitsSet(InBits,InBits-Bits)); in isTruncWithZeroHighBitsInput()
32799 DAG.MaskedValueIsZero(X, APInt::getBitsSetFrom(VT.getSizeInBits(), 8))) { in LowerPARITY()
42512 if (DAG.MaskedValueIsZero(In, Mask)) { in combineTargetShuffle()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp20119 if (MaskedValueIsZero(V, Mask, SimplifyQuery(*DL))) in collectValuesToDemote()
20132 if (MaskedValueIsZero(V, Mask, SimplifyQuery(*DL))) in collectValuesToDemote()
20338 MaskedValueIsZero(I->getOperand(0), ShiftedBits, in collectValuesToDemote()
20374 return MaskedValueIsZero(I->getOperand(0), Mask, SimplifyQuery(*DL)) && in collectValuesToDemote()
20375 MaskedValueIsZero(I->getOperand(1), Mask, SimplifyQuery(*DL)); in collectValuesToDemote()
20414 return MaskedValueIsZero(I->getOperand(0), Mask, in collectValuesToDemote()
20416 MaskedValueIsZero(I->getOperand(1), Mask, SimplifyQuery(*DL)); in collectValuesToDemote()
20429 MaskedValueIsZero(I->getOperand(0), Mask, in collectValuesToDemote()
20434 MaskedValueIsZero(I->getOperand(1), Mask, SimplifyQuery(*DL))); in collectValuesToDemote()
20448 MaskedValueIsZero(I->getOperand(0), Mask, SimplifyQuery(*DL))); in collectValuesToDemote()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp2428 if (MaskedValueIsZero(N, *C2, Q)) in simplifyOrInst()
2434 if (MaskedValueIsZero(N, *C1, Q)) in simplifyOrInst()
6327 if (MaskedValueIsZero(Op0, APInt::getHighBitsSet(BitWidth, BitWidth - 1), in simplifyUnaryIntrinsic()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp14241 bool LHSIsU = DAG.MaskedValueIsZero(LHS, HighMask); in ReplaceNodeResults()
14242 bool RHSIsU = DAG.MaskedValueIsZero(RHS, HighMask); in ReplaceNodeResults()
15376 if (!DAG.MaskedValueIsZero(N0.getOperand(0), Mask)) in combineAddOfBooleanXor()
15502 if (!DAG.MaskedValueIsZero(LeftShiftOperand, ~Mask)) in combineSubShiftToOrcB()
15575 if (!DAG.MaskedValueIsZero(N00, Mask) || !DAG.MaskedValueIsZero(N10, Mask)) in combineDeMorganOfBoolean()
16419 if (DAG.MaskedValueIsZero(N0.getOperand(0), SignMask)) in performSETCCCombine()
16779 if (DAG.MaskedValueIsZero(Op, in fillUpExtensionSupportForSplat()
18250 if (!DAG.MaskedValueIsZero(Xor0, Mask)) in tryDemorganOfBooleanCondition()
18329 DAG.MaskedValueIsZero(VarOp, Mask); in combine_CC()
18401 if (isOneConstant(RHS) && DAG.MaskedValueIsZero(LHS, Mask)) { in combine_CC()
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