Searched refs:MaskedMCID (Results 1 – 2 of 2) sorted by relevance
220 const MCInstrDesc &MaskedMCID = TII->get(MI.getOpcode()); in convertToUnmasked() local221 assert(RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags) == in convertToUnmasked()
3615 const MCInstrDesc &MaskedMCID = TII->get(N->getMachineOpcode()); in doPeepholeMaskedRVV() local3616 assert(RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags) == in doPeepholeMaskedRVV()3882 const MCInstrDesc &MaskedMCID = TII->get(MaskedOpc); in performCombineVMergeAndVOps() local3883 assert(RISCVII::hasVecPolicyOp(MaskedMCID.TSFlags) && in performCombineVMergeAndVOps()3885 assert(MaskedMCID.getOperandConstraint(MaskedMCID.getNumDefs(), in performCombineVMergeAndVOps()