Searched refs:MaskLo (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1434 SDValue MaskLo, MaskHi; in SplitMask() local 1437 GetSplitVector(Mask, MaskLo, MaskHi); in SplitMask() 1439 std::tie(MaskLo, MaskHi) = DAG.SplitVector(Mask, DL); in SplitMask() 1440 return std::make_pair(MaskLo, MaskHi); in SplitMask() 1461 SDValue MaskLo, MaskHi; in SplitVecRes_BinOp() local 1462 std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(2)); in SplitVecRes_BinOp() 1469 {LHSLo, RHSLo, MaskLo, EVLLo}, Flags); in SplitVecRes_BinOp() 1495 SDValue MaskLo, MaskHi; in SplitVecRes_TernaryOp() local 1496 std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(3)); in SplitVecRes_TernaryOp() 1503 {Op0Lo, Op1Lo, Op2Lo, MaskLo, EVLLo}, Flags); in SplitVecRes_TernaryOp() [all …]
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| H A D | LegalizeIntegerTypes.cpp | 1711 SDValue MaskLo, MaskHi, EVLLo, EVLHi; in PromoteIntRes_TRUNCATE() local 1712 std::tie(MaskLo, MaskHi) = SplitMask(N->getOperand(1)); in PromoteIntRes_TRUNCATE() 1715 EOp1 = DAG.getNode(ISD::VP_TRUNCATE, dl, HalfNVT, EOp1, MaskLo, EVLLo); in PromoteIntRes_TRUNCATE()
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| H A D | TargetLowering.cpp | 2473 APInt MaskLo = DemandedBits.getLoBits(HalfBitWidth).trunc(HalfBitWidth); in SimplifyDemandedBits() local 2478 if (SimplifyDemandedBits(Op.getOperand(0), MaskLo, KnownLo, TLO, Depth + 1)) in SimplifyDemandedBits()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 3169 Register MaskLo = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK() local 3172 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), MaskLo) in selectG_PTRMASK() 3176 .addReg(MaskLo); in selectG_PTRMASK()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 7166 auto [MaskLo, MaskHi] = DAG.SplitVector(Op.getOperand(2), DL); in SplitVectorReductionOp() 7172 {Op.getOperand(0), Lo, MaskLo, EVLLo}, Op->getFlags()); in SplitVectorReductionOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 24377 static const int MaskLo[] = {0, 0, 2, 2}; in LowerVSETCC() local 24378 SDValue Result = DAG.getVectorShuffle(MVT::v4i32, dl, GT, GT, MaskLo); in LowerVSETCC() 24403 static const int MaskLo[] = { 0, 0, 2, 2 }; in LowerVSETCC() local 24405 SDValue GTLo = DAG.getVectorShuffle(MVT::v4i32, dl, GT, GT, MaskLo); in LowerVSETCC()
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