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Searched refs:MaskConst (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DInstructions.cpp1901 SmallVector<Constant *, 16> MaskConst; in convertShuffleMaskForBitcode() local
1904 MaskConst.push_back(PoisonValue::get(Int32Ty)); in convertShuffleMaskForBitcode()
1906 MaskConst.push_back(ConstantInt::get(Int32Ty, Elem)); in convertShuffleMaskForBitcode()
1908 return ConstantVector::get(MaskConst); in convertShuffleMaskForBitcode()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2812 SDValue MaskConst = DAG.getConstant(0xfffff000, DL, MVT::i32); in LowerFLOGCommon() local
2813 SDValue YHInt = DAG.getNode(ISD::AND, DL, MVT::i32, YAsInt, MaskConst); in LowerFLOGCommon()
3119 SDValue MaskConst = DAG.getConstant(0xfffff000, SL, MVT::i32); in lowerFEXP() local
3120 SDValue XHAsInt = DAG.getNode(ISD::AND, SL, MVT::i32, XAsInt, MaskConst); in lowerFEXP()
H A DAMDGPULegalizerInfo.cpp3469 auto MaskConst = B.buildConstant(Ty, 0xfffff000); in legalizeFlogCommon() local
3470 auto YH = B.buildAnd(Ty, Y, MaskConst); in legalizeFlogCommon()
3736 auto MaskConst = B.buildConstant(Ty, 0xfffff000); in legalizeFExp() local
3737 auto XH = B.buildAnd(Ty, X, MaskConst); in legalizeFExp()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp14153 SDValue MaskConst = DAG.getBuildVector(IVT, DL, MaskElts); in LowerVECTOR_SHUFFLE() local
14154 return DAG.getBitcast(VT, DAG.getNode(AArch64ISD::BSP, DL, IVT, MaskConst, in LowerVECTOR_SHUFFLE()
16763 SmallVector<Constant *, 16> MaskConst; in createTblForTrunc() local
16766 MaskConst.push_back(Builder.getInt8( in createTblForTrunc()
16770 MaskConst.push_back(Builder.getInt8(255)); in createTblForTrunc()
16794 Parts.push_back(ConstantVector::get(MaskConst)); in createTblForTrunc()
16823 Parts.push_back(ConstantVector::get(MaskConst)); in createTblForTrunc()
19114 SDValue MaskConst = DAG.getNode(ISD::BITCAST, DL, IntVT, SourceConst); in performVectorCompareAndMaskUnaryOpCombine() local
19116 N->getOperand(0)->getOperand(0), MaskConst); in performVectorCompareAndMaskUnaryOpCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp15759 ConstantSDNode *MaskConst = dyn_cast<ConstantSDNode>(N->getOperand(1)); in reduceANDOfAtomicLoad() local
15760 if (!MaskConst) in reduceANDOfAtomicLoad()
15762 uint64_t Mask = MaskConst->getZExtValue(); in reduceANDOfAtomicLoad()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp26239 auto *MaskConst = dyn_cast<ConstantSDNode>(Mask); in getScalarMaskingNode() local
26240 if (MaskConst && (MaskConst->getZExtValue() & 0x1)) in getScalarMaskingNode()
26258 if (MaskConst) { in getScalarMaskingNode()
26259 assert((MaskConst->getZExtValue() & 0x1) == 0 && "Expected false mask"); in getScalarMaskingNode()
56935 SDValue MaskConst = DAG.getBitcast(IntVT, SourceConst); in combineVectorCompareAndMaskUnaryOp() local
56937 MaskConst); in combineVectorCompareAndMaskUnaryOp()