Searched refs:MagVT (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1726 EVT MagVT = MagAsInt.IntValue.getValueType(); in ExpandFCOPYSIGN() local
1727 SDValue ClearSignMask = DAG.getConstant(~MagAsInt.SignMask, DL, MagVT); in ExpandFCOPYSIGN()
1728 SDValue ClearedSign = DAG.getNode(ISD::AND, DL, MagVT, MagAsInt.IntValue, in ExpandFCOPYSIGN()
1736 SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
1737 ShiftVT = MagVT; in ExpandFCOPYSIGN()
1748 SignBit = DAG.getNode(ISD::TRUNCATE, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
1752 SDValue CopiedSign = DAG.getNode(ISD::OR, DL, MagVT, ClearedSign, SignBit, in ExpandFCOPYSIGN()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 7278 EVT MagVT = Mag.getValueType(); in lowerFCOPYSIGN() local
7280 if (MagVT.getVectorNumElements() > 2) in lowerFCOPYSIGN()
7286 if (MagVT == SignVT) in lowerFCOPYSIGN()
7296 SDValue SignAsHalf16 = DAG.getNode(ISD::BITCAST, SL, MagVT, SignAsInt16); in lowerFCOPYSIGN()
7298 return DAG.getNode(ISD::FCOPYSIGN, SL, MagVT, Mag, SignAsHalf16); in lowerFCOPYSIGN()
11956 EVT MagVT = MagnitudeOp.getValueType(); in performFCopySignCombine() local
11958 unsigned NumElts = MagVT.isVector() ? MagVT.getVectorNumElements() : 1; in performFCopySignCombine()
11960 if (MagVT.getScalarType() == MVT::f64) { in performFCopySignCombine()
11961 EVT F32VT = MagVT.isVector() in performFCopySignCombine()
11977 MagVT.isVector() in performFCopySignCombine()
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