| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.h | 25 class MachineIRBuilder; variable 42 MachineIRBuilder &B) const; 45 MachineIRBuilder &B) const; 47 MachineIRBuilder &B) const; 49 MachineIRBuilder &B) const; 51 MachineIRBuilder &B) const; 53 MachineIRBuilder &B) const; 55 MachineIRBuilder &B, bool Signed) const; 57 MachineIRBuilder &B, bool Signed) const; 60 MachineIRBuilder &B) const; [all …]
|
| H A D | AMDGPUCallLowering.h | 27 void lowerParameterPtr(Register DstReg, MachineIRBuilder &B, 30 void lowerParameter(MachineIRBuilder &B, ArgInfo &AI, uint64_t Offset, 37 bool lowerReturnVal(MachineIRBuilder &B, const Value *Val, 43 bool lowerReturn(MachineIRBuilder &B, const Value *Val, 47 bool lowerFormalArgumentsKernel(MachineIRBuilder &B, const Function &F, 50 bool lowerFormalArguments(MachineIRBuilder &B, const Function &F, 54 bool passSpecialInputs(MachineIRBuilder &MIRBuilder, 70 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder, 76 MachineIRBuilder &MIRBuilder, MachineInstrBuilder &CallInst, 81 bool lowerTailCall(MachineIRBuilder [all...] |
| H A D | AMDGPURegisterBankInfo.h | 28 class MachineIRBuilder; variable 48 bool buildVCopy(MachineIRBuilder &B, Register DstReg, Register SrcReg) const; 56 bool executeInWaterfallLoop(MachineIRBuilder &B, 60 Register buildReadFirstLane(MachineIRBuilder &B, MachineRegisterInfo &MRI, 63 bool executeInWaterfallLoop(MachineIRBuilder &B, MachineInstr &MI, 66 void constrainOpWithReadfirstlane(MachineIRBuilder &B, MachineInstr &MI, 68 bool applyMappingDynStackAlloc(MachineIRBuilder &B, 71 bool applyMappingLoad(MachineIRBuilder &B, const OperandsMapper &OpdMapper, 73 bool applyMappingImage(MachineIRBuilder &B, MachineInstr &MI, 75 unsigned setBufferOffsets(MachineIRBuilder [all...] |
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | IRTranslator.h | 205 MachineIRBuilder &MIRBuilder); 213 MachineIRBuilder &MIRBuilder); 221 MachineIRBuilder &MIRBuilder); 225 MachineIRBuilder &MIRBuilder); 229 bool translateBitCast(const User &U, MachineIRBuilder &MIRBuilder); 232 bool translateLoad(const User &U, MachineIRBuilder &MIRBuilder); 235 bool translateStore(const User &U, MachineIRBuilder &MIRBuilder); 238 bool translateMemFunc(const CallInst &CI, MachineIRBuilder &MIRBuilder, 242 bool translateTrap(const CallInst &U, MachineIRBuilder &MIRBuilder, 249 MachineIRBuilder &MIRBuilder); [all …]
|
| H A D | CallLowering.h | 39 class MachineIRBuilder; variable 244 MachineIRBuilder &MIRBuilder; 248 ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder, in ValueHandler() 333 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in IncomingValueHandler() 349 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in OutgoingValueHandler() 416 MachineIRBuilder &MIRBuilder, 426 MachineIRBuilder &MIRBuilder, 466 void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy, 472 void insertSRetStores(MachineIRBuilder &MIRBuilder, Type *RetTy, 485 void insertSRetOutgoingArgument(MachineIRBuilder &MIRBuilder, [all …]
|
| H A D | CSEMIRBuilder.h | 39 class LLVM_ABI CSEMIRBuilder : public MachineIRBuilder { 99 using MachineIRBuilder::MachineIRBuilder; 105 using MachineIRBuilder::buildConstant; 111 using MachineIRBuilder::buildFConstant;
|
| H A D | LegalizerHelper.h | 38 class MachineIRBuilder; variable 53 MachineIRBuilder &MIRBuilder; 84 MachineIRBuilder &B); 86 GISelChangeObserver &Observer, MachineIRBuilder &B, 281 LegalizeResult createGetStateLibcall(MachineIRBuilder &MIRBuilder, 284 LegalizeResult createSetStateLibcall(MachineIRBuilder &MIRBuilder, 287 LegalizeResult createResetStateLibcall(MachineIRBuilder &MIRBuilder, 290 LegalizeResult createFCMPLibcall(MachineIRBuilder &MIRBuilder, 295 getNeutralElementForVecReduce(unsigned Opcode, MachineIRBuilder &MIRBuilder, 299 MachineIRBuilder &MIRBuilder, unsigned Size, [all …]
|
| H A D | InlineAsmLowering.h | 22 class MachineIRBuilder; variable 38 bool lowerInlineAsm(MachineIRBuilder &MIRBuilder, const CallBase &CB, 49 MachineIRBuilder &MIRBuilder) const;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVGlobalRegistry.h | 92 SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder, 95 SPIRVType *findSPIRVType(const Type *Ty, MachineIRBuilder &MIRBuilder, 99 restOfCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder, 107 SPIRVType *createOpType(MachineIRBuilder &MIRBuilder, 108 std::function<MachineInstr *(MachineIRBuilder &)> Op); 281 MachineIRBuilder &MIRBuilder, 305 MachineIRBuilder MIRBuilder(I); in getOrCreateSPIRVType() 310 MachineIRBuilder &MIRBuilder, in getOrCreateSPIRVType() 331 StringRef TypeStr, MachineIRBuilder &MIRBuilder, bool EmitIR, 426 SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder); [all …]
|
| H A D | SPIRVGlobalRegistry.cpp | 120 const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, in assignTypeToVReg() 140 inline Register createTypeVReg(MachineIRBuilder &MIRBuilder) { in createTypeVReg() 144 SPIRVType *SPIRVGlobalRegistry::getOpTypeBool(MachineIRBuilder &MIRBuilder) { in getOpTypeBool() 145 return createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) { in getOpTypeBool() 171 MachineIRBuilder &MIRBuilder, in getOpTypeInt() 176 return createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) { in getOpTypeInt() 198 MachineIRBuilder &MIRBuilder) { in getOpTypeFloat() 199 return createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) { in getOpTypeFloat() 206 SPIRVType *SPIRVGlobalRegistry::getOpTypeVoid(MachineIRBuilder &MIRBuilder) { in getOpTypeVoid() 207 return createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) { in getOpTypeVoid() [all …]
|
| H A D | SPIRVCallLowering.h | 37 void produceIndirectPtrTypes(MachineIRBuilder &MIRBuilder) const; 44 bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val, 49 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 54 bool lowerCall(MachineIRBuilder &MIRBuilder,
|
| H A D | SPIRVBuiltins.cpp | 442 buildBoolRegister(MachineIRBuilder &MIRBuilder, const SPIRVType *ResultType, in buildBoolRegister() 467 static bool buildSelectInst(MachineIRBuilder &MIRBuilder, in buildSelectInst() 491 MachineIRBuilder &MIRBuilder, in buildLoadInst() 506 MachineIRBuilder &MIRBuilder, SPIRVType *VariableType, in buildBuiltinVariableLoad() 539 SPIRVGlobalRegistry *GR, MachineIRBuilder &MIB, 578 MachineIRBuilder &MIRBuilder, in buildConstantIntReg32() 586 MachineIRBuilder &MIRBuilder, in buildScopeReg() 613 MachineIRBuilder &MIRBuilder, in buildMemSemanticsReg() 630 static bool buildOpFromWrapper(MachineIRBuilder &MIRBuilder, unsigned Opcode, in buildOpFromWrapper() 647 MachineIRBuilder &MIRBuilder) { in buildAtomicInitInst() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVLegalizerInfo.h | 23 class MachineIRBuilder; variable 42 bool legalizeShlAshrLshr(MachineInstr &MI, MachineIRBuilder &MIRBuilder, 45 bool legalizeBRJT(MachineInstr &MI, MachineIRBuilder &MIRBuilder) const; 46 bool legalizeVAStart(MachineInstr &MI, MachineIRBuilder &MIRBuilder) const; 47 bool legalizeVScale(MachineInstr &MI, MachineIRBuilder &MIB) const; 48 bool legalizeExt(MachineInstr &MI, MachineIRBuilder &MIRBuilder) const; 49 bool legalizeSplatVector(MachineInstr &MI, MachineIRBuilder &MIB) const; 50 bool legalizeExtractSubvector(MachineInstr &MI, MachineIRBuilder &MIB) const; 52 MachineIRBuilder &MIB) const; 54 MachineIRBuilder &MIB) const;
|
| H A D | RISCVCallLowering.h | 23 class MachineIRBuilder; variable 31 bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val, 39 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 43 bool lowerCall(MachineIRBuilder &MIRBuilder, 47 void saveVarArgRegisters(MachineIRBuilder &MIRBuilder,
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 24 void MachineIRBuilder::setMF(MachineFunction &MF) { in setMF() 40 MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert(unsigned Opcode) { in buildInstrNoInsert() 45 MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) { in insertInstr() 52 MachineIRBuilder::buildDirectDbgValue(Register Reg, const MDNode *Variable, in buildDirectDbgValue() 65 MachineIRBuilder::buildIndirectDbgValue(Register Reg, const MDNode *Variable, in buildIndirectDbgValue() 77 MachineInstrBuilder MachineIRBuilder::buildFIDbgValue(int FI, in buildFIDbgValue() 92 MachineInstrBuilder MachineIRBuilder::buildConstDbgValue(const Constant &C, in buildConstDbgValue() 127 MachineInstrBuilder MachineIRBuilder::buildDbgLabel(const MDNode *Label) { in buildDbgLabel() 136 MachineInstrBuilder MachineIRBuilder::buildDynStackAlloc(const DstOp &Res, in buildDynStackAlloc() 147 MachineInstrBuilder MachineIRBuilder::buildFrameIndex(const DstOp &Res, in buildFrameIndex() [all …]
|
| H A D | CombinerHelperCasts.cpp | 51 MatchInfo = [=](MachineIRBuilder &B) { in matchSextOfTrunc() 60 MatchInfo = [=](MachineIRBuilder &B) { B.buildCopy(Dst, Src); }; in matchSextOfTrunc() 66 MatchInfo = [=](MachineIRBuilder &B) { in matchSextOfTrunc() 74 MatchInfo = [=](MachineIRBuilder &B) { B.buildSExt(Dst, Src); }; in matchSextOfTrunc() 93 MatchInfo = [=](MachineIRBuilder &B) { B.buildCopy(Dst, Src); }; in matchZextOfTrunc() 99 MatchInfo = [=](MachineIRBuilder &B) { in matchZextOfTrunc() 107 MatchInfo = [=](MachineIRBuilder &B) { in matchZextOfTrunc() 130 MatchInfo = [=](MachineIRBuilder &B) { B.buildSExt(Dst, Src); }; in matchNonNegZext() 153 MatchInfo = [=](MachineIRBuilder &B) { B.buildCopy(Dst, Src); }; in matchTruncateOfExt() 164 MatchInfo = [=](MachineIRBuilder &B) { in matchTruncateOfExt() [all …]
|
| H A D | CombinerHelperVectorOps.cpp | 84 MatchInfo = [=](MachineIRBuilder &B) { B.buildUndef(Dst); }; in matchExtractVectorElement() 139 MatchInfo = [=](MachineIRBuilder &B) { in matchExtractVectorElementWithDifferentIndices() 181 MatchInfo = [=](MachineIRBuilder &B) { in matchExtractVectorElementWithBuildVector() 248 MatchInfo = [=](MachineIRBuilder &B) { in matchExtractVectorElementWithBuildVectorTrunc() 305 MatchInfo = [=](MachineIRBuilder &B) { B.buildUndef(Dst); }; in matchExtractVectorElementWithShuffleVector() 334 MatchInfo = [=](MachineIRBuilder &B) { in matchExtractVectorElementWithShuffleVector() 358 MatchInfo = [=](MachineIRBuilder &B) { B.buildUndef(Dst); }; in matchInsertVectorElementOOB() 377 MatchInfo = [=](MachineIRBuilder &B) { in matchAddOfVScale() 398 MatchInfo = [=](MachineIRBuilder &B) { in matchMulOfVScale() 417 MatchInfo = [=](MachineIRBuilder &B) { in matchSubOfVScale() [all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.h | 27 class MachineIRBuilder; variable 34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 44 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 48 bool lowerCall(MachineIRBuilder &MIRBuilder, 53 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder, 63 using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned, 67 std::function<void(MachineIRBuilder &, int, CCValAssign &)>; 69 void saveVarArgRegisters(MachineIRBuilder &MIRBuilder, 73 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
|
| H A D | AArch64LegalizerInfo.h | 38 MachineIRBuilder &MIRBuilder) const; 40 MachineIRBuilder &MIRBuilder, 43 MachineIRBuilder &MIRBuilder, 47 MachineIRBuilder &MIRBuilder, 54 MachineIRBuilder &MIRBuilder) const; 56 MachineIRBuilder &MIRBuilder,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.h | 27 class MachineIRBuilder; variable 34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 38 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 42 bool lowerCall(MachineIRBuilder &MIRBuilder, 48 bool lowerReturnVal(MachineIRBuilder &MIRBuilder, const Value *Val,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.h | 34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 38 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 42 bool lowerCall(MachineIRBuilder &MIRBuilder, 48 M68kIncomingValueHandler(MachineIRBuilder &MIRBuilder, in M68kIncomingValueHandler()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCCallLowering.h | 28 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 31 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 34 bool lowerCall(MachineIRBuilder &MIRBuilder, 40 PPCIncomingValueHandler(MachineIRBuilder &MIRBuilder, in PPCIncomingValueHandler() 66 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.h | 27 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 31 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 35 bool lowerCall(MachineIRBuilder &MIRBuilder,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/GISel/ |
| H A D | BPFCallLowering.cpp | 25 bool BPFCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() 35 bool BPFCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, in lowerFormalArguments() 42 bool BPFCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.h | |