Searched refs:MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 (Results 1 – 8 of 8) sorted by relevance
259 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19
261 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19
409 #define MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x1A0 0x408 0x000 0x5 0… macro
495 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19 /* SPI_A_/WP_(IO2) */
768 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x40000041 /* LTE_RST# */
607 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x40000000
988 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x140
1131 <MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x6>; /* SODIMM 150 */