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Searched refs:MVE (Results 1 – 20 of 20) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleM55.td17 // Cortex-M4 are MVE instructions and the ability to dual issue thumb1
21 // MVE
23 // The EPU pipelines now include both MVE and FP instructions. It has four
31 // Each MVE instruction needs to take 2 beats, each performing 64bits of the
48 // instruction. MVE instruction take two beats, modelled using
69 // All instructions we cannot dual issue are "SingleIssue=1" (MVE/FP and T2
107 def M55UnitVecALU : ProcResource<1> { let BufferSize = 0; } // MVE integer pipe
108 def M55UnitVecFPALU : ProcResource<1> { let BufferSize = 0; } // MVE float pipe
109 def M55UnitLoadStore : ProcResource<1> { let BufferSize = 0; } // MVE load/store pipe
110 def M55UnitVecSys : ProcResource<1> { let BufferSize = 0; } // MVE contro
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H A DARMRegisterInfo.td409 // MVE Condition code register.
415 // output to an instruction such as MVE VADC.
512 // MVE 128-bit vector register class. This class is only really needed for
582 // Same as QQPR but for MVE, containing the 7 register pairs made up from Q0-Q7.
608 // Same as QQPR but for MVE, containing the 5 register quads made up from Q0-Q7.
H A DARMFeatures.td32 // FP loads/stores/moves, shared between VFP and MVE (even in the integer-only
38 // extension) and MVE (even in the integer-only version).
379 "Model MVE instructions as a 1 beat per tick architecture">;
382 "Model MVE instructions as a 2 beats per tick architecture">;
385 "Model MVE instructions as a 4 beats per tick architecture">;
H A DARMPredicates.td55 "armv8.1m.main with FP or MVE">;
H A DARMInstrMVE.td1 //===-- ARMInstrMVE.td - MVE support for ARM ---------------*- tablegen -*-===//
9 // This file describes the ARM MVE instruction set.
241 // used by MVE.
262 // The most common representation of the vector element size in MVE
394 let DecoderNamespace = "MVE";
428 let DecoderNamespace = "MVE";
439 let DecoderNamespace = "MVE";
1940 // start of MVE Integer instructions
2717 // end of MVE Integer instructions
3545 // start of MVE Floatin
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H A DARMInstrInfo.td253 // Vector operations shared between NEON and MVE
319 // because that's what (MVE) VSTRH.16 followed by VLDRB.8 would do. So the
475 // NEON/MVE pattern fragments
703 // Power-of-two operand for MVE VIDUP and friends, which encode
6226 // MVE Support
H A DARMInstrFormats.td136 def MVEDomain : Domain<8>; // Instructions in MVE and ARMv8.1m
224 // VPT-predicated MVE instruction.
/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DARM.cpp158 return ArchKind == llvm::ARM::ArchKind::ARMV8_1MMainline && MVE != 0; in hasMVE()
162 return hasMVE() && (MVE & MVE_FP); in hasMVEFloat()
507 MVE = 0; in handleTargetFeatures()
588 MVE |= MVE_INT; in handleTargetFeatures()
592 MVE |= MVE_INT | MVE_FP; in handleTargetFeatures()
H A DARM.h67 unsigned MVE : 2;
/freebsd/contrib/llvm-project/clang/utils/TableGen/
H A DMveEmitter.cpp2029 constexpr unsigned MVE = 1; in EmitHeader() local
2038 parts[MVE] << "typedef uint16_t mve_pred16_t;\n"; in EmitHeader()
2048 raw_ostream &OS = parts[ST->requiresFloat() ? MVEFloat : MVE]; in EmitHeader()
2055 parts[MVE] << "\n"; in EmitHeader()
2073 : Int.requiresMVE() ? MVE : None]; in EmitHeader()
2105 raw_ostream &OS = parts[MVE]; in EmitHeader()
2138 else if (i == MVE) in EmitHeader()
/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/
H A DARM.cpp488 auto MVE = llvm::find(llvm::reverse(F), "+mve"); in hasIntegerMVE() local
490 return MVE != F.rend() && in hasIntegerMVE()
491 (NoMVE == F.rend() || std::distance(MVE, NoMVE) > 0); in hasIntegerMVE()
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_mve_defs.td209 // C++ and not autogenerated at all. The effect in the MVE builtin codegen
254 // and floating types that MVE uses.
492 // checks, etc). Used for redeclaring MVE intrinsics in the arm_cde.h header.
H A Darm_cde.td16 // f64 is not defined in arm_mve_defs.td because MVE instructions only work with
H A DBuiltinsARM.def209 // Builtins for implementing ACLE MVE intrinsics. (Unlike NEON, these
H A Darm_mve.td1 //===- arm_mve.td - ACLE intrinsic functions for MVE architecture ---------===//
10 // functions wrapping the MVE vector instruction set and scalar shift
H A DAttrDocs.td6933 MVE instruction set. It is used to define the vector types used by the MVE
6940 conversion. The aim is to prevent spurious ambiguity in ARM MVE polymorphic
H A DDiagnosticSemaKinds.td7790 "'__clang_arm_mve_strict_polymorphism' attribute can only be applied to an MVE/NEON vector type">;
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsARM.td1105 // MVE scalar shifts.
1227 // MVE vector absolute difference and accumulate across vector
1237 // The following 3 intrinsics are MVE vector reductions with two vector
/freebsd/contrib/file/magic/Magdir/
H A Danimation1109 # Type: Interplay MVE Movie
1112 0 string Interplay\040MVE\040File\032 Interplay MVE Movie
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DCore.cpp2164 LLVMOpaqueValueMetadataEntry MVE = in LLVMValueMetadataEntriesGetKind() local
2166 return MVE.Kind; in LLVMValueMetadataEntriesGetKind()
2172 LLVMOpaqueValueMetadataEntry MVE = in LLVMValueMetadataEntriesGetMetadata() local
2174 return MVE.Metadata; in LLVMValueMetadataEntriesGetMetadata()