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Searched refs:MVE (Results 1 – 20 of 20) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleM55.td17 // Cortex-M4 are MVE instructions and the ability to dual issue thumb1
21 // MVE
23 // The EPU pipelines now include both MVE and FP instructions. It has four
31 // Each MVE instruction needs to take 2 beats, each performing 64bits of the
48 // instruction. MVE instruction take two beats, modelled using
69 // All instructions we cannot dual issue are "SingleIssue=1" (MVE/FP and T2
107 def M55UnitVecALU : ProcResource<1> { let BufferSize = 0; } // MVE integer pipe
108 def M55UnitVecFPALU : ProcResource<1> { let BufferSize = 0; } // MVE float pipe
109 def M55UnitLoadStore : ProcResource<1> { let BufferSize = 0; } // MVE load/store pipe
110 def M55UnitVecSys : ProcResource<1> { let BufferSize = 0; } // MVE contro
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H A DARMRegisterInfo.td409 // MVE Condition code register.
415 // output to an instruction such as MVE VADC.
521 // MVE 128-bit vector register class. This class is only really needed for
591 // Same as QQPR but for MVE, containing the 7 register pairs made up from Q0-Q7.
617 // Same as QQPR but for MVE, containing the 5 register quads made up from Q0-Q7.
H A DARMFeatures.td32 // FP loads/stores/moves, shared between VFP and MVE (even in the integer-only
38 // extension) and MVE (even in the integer-only version).
382 "Model MVE instructions as a 1 beat per tick architecture">;
385 "Model MVE instructions as a 2 beats per tick architecture">;
388 "Model MVE instructions as a 4 beats per tick architecture">;
H A DARMScheduleM85.td12 // stated to have a ReadAdvance of -1. The FP/MVE pipe actually begins at EX3
313 // VFP/MVE loads and stores
559 // Sched definitions for FP and MVE operations
695 // MVE beatwise instructions
698 // NOTE2: MVE integer MAC->MAC accumulate latencies are set as if the
H A DARMPredicates.td55 "armv8.1m.main with FP or MVE">;
H A DARMInstrMVE.td1 //===-- ARMInstrMVE.td - MVE support for ARM ---------------*- tablegen -*-===//
9 // This file describes the ARM MVE instruction set.
242 // used by MVE.
263 // The most common representation of the vector element size in MVE
395 let DecoderNamespace = "MVE";
429 let DecoderNamespace = "MVE";
440 let DecoderNamespace = "MVE";
1941 // start of MVE Integer instructions
2651 // end of MVE Integer instructions
3479 // start of MVE Floating Point instructions
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H A DARMInstrInfo.td279 // Vector operations shared between NEON and MVE
345 // because that's what (MVE) VSTRH.16 followed by VLDRB.8 would do. So the
495 // NEON/MVE pattern fragments
723 // Power-of-two operand for MVE VIDUP and friends, which encode
6259 // MVE Support
H A DARMInstrFormats.td136 def MVEDomain : Domain<8>; // Instructions in MVE and ARMv8.1m
214 // VPT-predicated MVE instruction.
/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DARM.cpp157 return ArchKind == llvm::ARM::ArchKind::ARMV8_1MMainline && MVE != 0; in hasMVE()
161 return hasMVE() && (MVE & MVE_FP); in hasMVEFloat()
509 MVE = 0; in handleTargetFeatures()
590 MVE |= MVE_INT; in handleTargetFeatures()
594 MVE |= MVE_INT | MVE_FP; in handleTargetFeatures()
1118 namespace MVE { namespace
1166 {&MVE::BuiltinStrings, MVE::BuiltinInfos, "__builtin_arm_mve_"}, in getTargetBuiltins()
H A DARM.h67 unsigned MVE : 2;
/freebsd/contrib/llvm-project/clang/utils/TableGen/
H A DMveEmitter.cpp2046 constexpr unsigned MVE = 1; in EmitHeader() local
2055 parts[MVE] << "typedef uint16_t mve_pred16_t;\n"; in EmitHeader()
2065 raw_ostream &OS = parts[ST->requiresFloat() ? MVEFloat : MVE]; in EmitHeader()
2072 parts[MVE] << "\n"; in EmitHeader()
2090 : Int.requiresMVE() ? MVE : None]; in EmitHeader()
2122 raw_ostream &OS = parts[MVE]; in EmitHeader()
2155 else if (i == MVE) in EmitHeader()
/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/
H A DARM.cpp525 auto MVE = llvm::find(llvm::reverse(F), "+mve"); in hasIntegerMVE() local
527 return MVE != F.rend() && in hasIntegerMVE()
528 (NoMVE == F.rend() || std::distance(MVE, NoMVE) > 0); in hasIntegerMVE()
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_mve_defs.td210 // C++ and not autogenerated at all. The effect in the MVE builtin codegen
255 // and floating types that MVE uses.
493 // checks, etc). Used for redeclaring MVE intrinsics in the arm_cde.h header.
H A Darm_cde.td16 // f64 is not defined in arm_mve_defs.td because MVE instructions only work with
H A Darm_mve.td1 //===- arm_mve.td - ACLE intrinsic functions for MVE architecture ---------===//
10 // functions wrapping the MVE vector instruction set and scalar shift
H A DAttrDocs.td7800 MVE instruction set. It is used to define the vector types used by the MVE
7807 conversion. The aim is to prevent spurious ambiguity in ARM MVE polymorphic
H A DDiagnosticSemaKinds.td8169 "'__clang_arm_mve_strict_polymorphism' attribute can only be applied to an MVE/NEON vector type">;
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsARM.td1095 // MVE scalar shifts.
1217 // MVE vector absolute difference and accumulate across vector
1227 // The following 3 intrinsics are MVE vector reductions with two vector
/freebsd/contrib/file/magic/Magdir/
H A Danimation1112 # Type: Interplay MVE Movie
1115 0 string Interplay\040MVE\040File\032 Interplay MVE Movie
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DCore.cpp2167 LLVMOpaqueValueMetadataEntry MVE = in LLVMValueMetadataEntriesGetKind() local
2169 return MVE.Kind; in LLVMValueMetadataEntriesGetKind()
2175 LLVMOpaqueValueMetadataEntry MVE = in LLVMValueMetadataEntriesGetMetadata() local
2177 return MVE.Metadata; in LLVMValueMetadataEntriesGetMetadata()