| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPNodes.def | 93 ADD_VVP_OP(VVP_SCATTER, MSCATTER) HANDLE_VP_TO_VVP(VP_SCATTER, VVP_SCATTER)
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1341 MSCATTER, enumerator
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| H A D | SelectionDAGNodes.h | 1437 case ISD::MSCATTER:
1478 case ISD::MSCATTER:
2921 N->getOpcode() == ISD::MSCATTER;
2959 : MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO,
2972 return N->getOpcode() == ISD::MSCATTER;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 884 MSCATTER, enumerator
1863 N->getOpcode() == X86ISD::MSCATTER; in classof()
1881 return N->getOpcode() == X86ISD::MSCATTER; in classof()
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| H A D | X86ISelLowering.cpp | 2026 setOperationAction(ISD::MSCATTER, VT, Custom); in X86TargetLowering()
2099 setOperationAction(ISD::MSCATTER, MVT::v2f32, Custom); in X86TargetLowering()
2100 setOperationAction(ISD::MSCATTER, MVT::v2i32, Custom); in X86TargetLowering()
2104 setOperationAction(ISD::MSCATTER, VT, Custom); in X86TargetLowering()
2557 ISD::MSCATTER, in X86TargetLowering()
26591 DAG.getMemIntrinsicNode(X86ISD::MSCATTER, dl, VTs, Ops, in getScatterNode()
31983 return DAG.getMemIntrinsicNode(X86ISD::MSCATTER, dl, VTs, Ops, in LowerMSCATTER()
32016 return DAG.getMemIntrinsicNode(X86ISD::MSCATTER, dl, VTs, Ops, in LowerMSCATTER()
32498 case ISD::MSCATTER: return LowerMSCATTER(Op, Subtarget, DAG); in LowerOperation()
34029 NODE_NAME_CASE(MSCATTER) in getTargetNodeName()
[all …]
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| H A D | X86ISelDAGToDAG.cpp | 6430 case X86ISD::MSCATTER: { in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 436 case ISD::MSCATTER: return "masked_scatter"; in getOperationName()
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| H A D | LegalizeVectorTypes.cpp | 3165 case ISD::MSCATTER: in SplitVectorOperand()
6384 case ISD::MSCATTER: Res = WidenVecOp_MSCATTER(N, OpNo); break; in WidenVectorOperand()
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| H A D | SelectionDAG.cpp | 884 case ISD::MSCATTER: { in AddNodeIDCustom()
9774 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops); in getMaskedScatter()
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| H A D | LegalizeDAG.cpp | 1175 case ISD::MSCATTER: in LegalizeOp()
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| H A D | LegalizeIntegerTypes.cpp | 1955 case ISD::MSCATTER: Res = PromoteIntOp_MSCATTER(cast<MaskedScatterSDNode>(N), in PromoteIntegerOperand()
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| H A D | DAGCombiner.cpp | 1964 case ISD::MSCATTER: return visitMSCATTER(N); in visit()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 870 setOperationAction({ISD::MLOAD, ISD::MSTORE, ISD::MGATHER, ISD::MSCATTER}, in RISCVTargetLowering()
1009 setOperationAction({ISD::MLOAD, ISD::MSTORE, ISD::MGATHER, ISD::MSCATTER}, in RISCVTargetLowering()
1226 {ISD::MLOAD, ISD::MSTORE, ISD::MGATHER, ISD::MSCATTER}, VT, Custom); in RISCVTargetLowering()
1360 {ISD::MLOAD, ISD::MSTORE, ISD::MGATHER, ISD::MSCATTER}, VT, Custom); in RISCVTargetLowering()
1494 setTargetDAGCombine({ISD::FCOPYSIGN, ISD::MGATHER, ISD::MSCATTER, in RISCVTargetLowering()
7106 case ISD::MSCATTER: in LowerOperation()
11974 // Custom lower MSCATTER/VP_SCATTER to a legalized form for RVV. It will then be
12000 // Else it must be a MSCATTER. in lowerMaskedScatter()
12017 assert(!IsTruncatingStore && "Unexpected truncating MSCATTER/VP_SCATTER"); in lowerMaskedScatter()
17163 case ISD::MSCATTER in PerformDAGCombine()
[all...] |
| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 767 def masked_scatter : SDNode<"ISD::MSCATTER", SDTMaskedScatter,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1117 setTargetDAGCombine({ISD::MGATHER, ISD::MSCATTER}); in AArch64TargetLowering()
1769 setOperationAction(ISD::MSCATTER, VT, Custom); in AArch64TargetLowering()
2080 setOperationAction(ISD::MSCATTER, VT, PreferSVE ? Default : Expand); in addTypeForFixedLengthSVE()
6948 case ISD::MSCATTER: in LowerOperation()
25346 case ISD::MSCATTER: in PerformDAGCombine()
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