| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstrBuilder.h | 231 const MachineInstrBuilder &add(ArrayRef<MachineOperand> MOs) const { in add() argument
232 for (const MachineOperand &MO : MOs) { in add()
515 ArrayRef<MachineOperand> MOs,
532 ArrayRef<MachineOperand> MOs,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 537 ArrayRef<MachineOperand> MOs,
666 ArrayRef<MachineOperand> MOs,
672 ArrayRef<MachineOperand> MOs,
|
| H A D | X86InstrInfo.cpp | 7095 static void addOperands(MachineInstrBuilder &MIB, ArrayRef<MachineOperand> MOs, in addOperands() argument
7097 unsigned NumAddrOps = MOs.size(); in addOperands()
7102 MIB.add(MOs[i]); in addOperands()
7107 assert(MOs.size() == 5 && "Unexpected memory operand list length"); in addOperands()
7109 const MachineOperand &MO = MOs[i]; in addOperands()
7146 ArrayRef<MachineOperand> MOs, in fuseTwoAddrInst() argument
7155 addOperands(MIB, MOs); in fuseTwoAddrInst()
7175 unsigned OpNo, ArrayRef<MachineOperand> MOs, in fuseInst() argument
7188 addOperands(MIB, MOs, PtrOffset); in fuseInst()
7207 ArrayRef<MachineOperand> MOs, in makeM0Inst() argument
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 824 SmallVector<MachineOperand> MOs; in EmitDbgInstrRef() local
836 MOs.push_back(MachineOperand::CreateReg( in EmitDbgInstrRef()
883 MOs.push_back(GetMOForConstDbgOp(DbgOperand)); in EmitDbgInstrRef()
906 MOs.push_back(MachineOperand::CreateDbgInstrRef(InstrNum, OperandIdx)); in EmitDbgInstrRef()
911 if (MOs.size() != OpCount) in EmitDbgInstrRef()
914 return BuildMI(*MF, DL, RefII, false, MOs, Var, Expr); in EmitDbgInstrRef()
|
| H A D | FastISel.cpp | 1316 SmallVector<MachineOperand, 1> MOs({MachineOperand::CreateReg( in lowerDbgValue() local
1324 TII.get(TargetOpcode::DBG_INSTR_REF), /*IsIndirect*/ false, MOs, in lowerDbgValue()
|
| H A D | SelectionDAGBuilder.cpp | 5994 SmallVector<MachineOperand, 1> MOs({MachineOperand::CreateReg( in EmitFuncArgumentDbgValue() local
6007 return BuildMI(MF, DL, Inst, false, MOs, Variable, NewDIExpr); in EmitFuncArgumentDbgValue()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveDebugVariables.cpp | 1675 SmallVector<MachineOperand, 8> MOs; in insertDebugValue() local
1677 MOs.assign(DbgValue.loc_nos().size(), in insertDebugValue()
1685 MOs.push_back(locations[LocNo]); in insertDebugValue()
1717 assert((!LocSpills[I] || MOs[I].isFI()) && in insertDebugValue()
1724 BuildMI(*MBB, I, getDebugLoc(), TII.get(DbgValueOpcode), IsIndirect, MOs, in insertDebugValue()
1729 I = findNextInsertLocation(MBB, I, StopIdx, MOs, LIS, TRI); in insertDebugValue()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | VarLocBasedImpl.cpp | 557 SmallVector<MachineOperand, 8> MOs; in BuildDbgValue() local
570 MOs.push_back(MachineOperand::CreateReg( in BuildDbgValue()
594 MOs.push_back(MachineOperand::CreateReg(Base, false)); in BuildDbgValue()
598 MOs.push_back(Orig); in BuildDbgValue()
602 MOs.push_back(Orig); in BuildDbgValue()
609 return BuildMI(MF, DbgLoc, IID, Indirect, MOs, Var, DIExpr); in BuildDbgValue()
|
| H A D | InstrRefBasedImpl.cpp | 1218 SmallVector<MachineOperand> MOs; in emitLoc() local
1221 MOs.clear(); in emitLoc()
1222 MOs.assign(Properties.getLocationOpCount(), GetRegOp(0)); in emitLoc()
1223 return BuildMI(MF, DL, Desc, false, MOs, Var.getVariable(), in emitLoc()
1245 MOs.push_back(Op.MO); in emitLoc()
1325 MOs.push_back(GetRegOp(Base)); in emitLoc()
1333 MOs.push_back(GetRegOp(LocID)); in emitLoc()
1337 return BuildMI(MF, DL, Desc, Indirect, MOs, Var.getVariable(), Expr); in emitLoc()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 2140 for (const auto &[Entry, MOs] : RegToMO) { in tryOptimizeAGPRPhis()
2141 if (MOs.size() == 1) in tryOptimizeAGPRPhis()
2150 const TargetRegisterClass *ARC = getRegOpRC(*MRI, *TRI, *MOs.front()); in tryOptimizeAGPRPhis()
2165 for (MachineOperand *MO : MOs) { in tryOptimizeAGPRPhis()
|