Searched refs:MO0 (Results 1 – 10 of 10) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenMemAbsolute.cpp | 147 const MachineOperand &MO0 = NextMI->getOperand(RegPos); in runOnMachineFunction() local
149 if (!MO0.isReg()) in runOnMachineFunction()
152 unsigned LoadStoreReg = MO0.getReg(); in runOnMachineFunction()
202 MIB->getOperand(0).setSubReg(MO0.getSubReg()); in runOnMachineFunction()
204 MIB.addReg(LoadStoreReg, 0, MO0.getSubReg()); in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 189 auto MO0 = *L0.memoperands().begin(); in getHazardType() local
190 auto BaseVal0 = MO0->getValue(); in getHazardType()
191 auto BasePseudoVal0 = MO0->getPseudoValue(); in getHazardType()
194 if (!MO0->getSize().hasValue() || MO0->getSize().getValue() > 4) in getHazardType()
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| H A D | ARMBaseInstrInfo.cpp | 1876 const MachineOperand &MO0 = MI0.getOperand(1); in produceSameValue() local
1878 if (MO0.getOffset() != MO1.getOffset()) in produceSameValue()
1886 return MO0.getGlobal() == MO1.getGlobal(); in produceSameValue()
1890 int CPI0 = MO0.getIndex(); in produceSameValue()
1929 const MachineOperand &MO0 = MI0.getOperand(i); in produceSameValue() local
1931 if (!MO0.isIdenticalTo(MO1)) in produceSameValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandPseudoInsts.cpp | 509 unsigned MO0, MO1, MO2, MO3; in expandLargeAddressLoad() local
514 MO0 = IdentifyingMO; in expandLargeAddressLoad()
523 MO0 = LoongArchII::MO_GOT_PC_LO; in expandLargeAddressLoad()
529 MO0 = IdentifyingMO; in expandLargeAddressLoad()
557 Part0.addExternalSymbol(SymName, MO0); in expandLargeAddressLoad()
562 Part0.addDisp(Symbol, 0, MO0); in expandLargeAddressLoad()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 241 MachineOperand *MO0 = &MI->getOperand(0); in verifyUseList() local
243 if (!(MO >= MO0 && MO < MO0+NumOps)) { in verifyUseList()
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| H A D | RegAllocFast.cpp | 1337 const MachineOperand &MO0 = MI.getOperand(I0); in findAndSortDefOperandIndexes() local
1339 Register Reg0 = MO0.getReg(); in findAndSortDefOperandIndexes()
1357 bool Livethrough0 = MO0.isEarlyClobber() || MO0.isTied() || in findAndSortDefOperandIndexes()
1358 (MO0.getSubReg() == 0 && !MO0.isUndef()); in findAndSortDefOperandIndexes()
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| H A D | MachineVerifier.cpp | 3203 const MachineOperand &MO0 = Phi.getOperand(I); in checkPHIOps() local
3204 if (!MO0.isReg()) { in checkPHIOps()
3205 report("Expected PHI operand to be a register", &MO0, I); in checkPHIOps()
3208 if (MO0.isImplicit() || MO0.isInternalRead() || MO0.isEarlyClobber() || in checkPHIOps()
3209 MO0.isDebug() || MO0.isTied()) in checkPHIOps()
3210 report("Unexpected flag on PHI operand", &MO0, I); in checkPHIOps()
3227 if (!MO0.isUndef() && PrInfo.reachable && in checkPHIOps()
3228 !PrInfo.isLiveOut(MO0.getReg())) in checkPHIOps()
3229 report("PHI operand is not live-out from predecessor", &MO0, I); in checkPHIOps()
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| H A D | TailDuplicator.cpp | 503 MachineOperand &MO0 = MI.getOperand(Idx); in updateSuccessorsPHIs() local
504 Register Reg = MO0.getReg(); in updateSuccessorsPHIs()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 1528 const MachineOperand &MO0 = MI.getOperand(0); in handleSpecialFP() local
1532 unsigned DstFP = getFPReg(MO0); in handleSpecialFP()
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| H A D | X86InstrInfo.cpp | 8453 MachineOperand &MO0 = DataMI->getOperand(0); in unfoldMemoryOperand() local
8474 MO1.ChangeToRegister(MO0.getReg(), false); in unfoldMemoryOperand()
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