| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 1282 MachineInstrBuilder MIB1(MF, NewMI); in expandMI() local
1283 MIB1->setPCSections(MF, MI.getPCSections()); in expandMI()
1284 MIB1.addReg(MI.getOperand(0).getReg(), RegState::Define) in expandMI()
1288 transferImpOps(MI, MIB1, MIB1); in expandMI()
1319 MachineInstrBuilder MIB1 = in expandMI() local
1339 MIB1.addGlobalAddress(MO1.getGlobal(), 0, Flags | AArch64II::MO_PAGE); in expandMI()
1343 MIB1.addExternalSymbol(MO1.getSymbolName(), Flags | AArch64II::MO_PAGE); in expandMI()
1350 MIB1.addConstantPoolIndex(MO1.getIndex(), MO1.getOffset(), in expandMI()
1357 transferImpOps(MI, MIB1, MIB2); in expandMI()
1375 auto MIB1 = in expandMI() local
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| H A D | AArch64InstrInfo.cpp | 6959 MachineInstrBuilder MIB1 = in genSubAdd2SubSub() local
6971 InsInstrs.push_back(MIB1); in genSubAdd2SubSub()
7079 MachineInstrBuilder MIB1; in genAlternativeCodeSequence() local
7082 MIB1 = BuildMI(MF, MIMetadata(Root), TII->get(OrrOpc), NewVR) in genAlternativeCodeSequence()
7094 MIB1 = BuildMI(MF, MIMetadata(Root), TII->get(MovI->Opcode), NewVR) in genAlternativeCodeSequence()
7098 InsInstrs.push_back(MIB1); in genAlternativeCodeSequence()
7127 MachineInstrBuilder MIB1 = in genAlternativeCodeSequence() local
7131 InsInstrs.push_back(MIB1); in genAlternativeCodeSequence()
7188 MachineInstrBuilder MIB1; in genAlternativeCodeSequence() local
7191 MIB1 = BuildMI(MF, MIMetadata(Root), TII->get(OrrOpc), NewVR) in genAlternativeCodeSequence()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 1176 MachineInstrBuilder MIB1 = in reassociateOps() local
1184 MIB1.addReg(RegX, getKillRegState(KillX)); in reassociateOps()
1186 MIB1.addReg(RegY, getKillRegState(KillY)); in reassociateOps()
1188 MIB1.add(MO); in reassociateOps()
1190 MIB1.copyImplicitOps(Prev); in reassociateOps()
1217 MIB1->setFlags(IntersectedFlags); in reassociateOps()
1218 MIB1->clearFlag(MachineInstr::MIFlag::NoSWrap); in reassociateOps()
1219 MIB1->clearFlag(MachineInstr::MIFlag::NoUWrap); in reassociateOps()
1220 MIB1->clearFlag(MachineInstr::MIFlag::IsExact); in reassociateOps()
1227 setSpecialOperandAttr(Root, Prev, *MIB1, *MIB2); in reassociateOps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16InstrInfo.cpp | 287 MachineInstrBuilder MIB1 = BuildMI(MBB, I, DL, get(Mips::LwConstant32), Reg1); in adjustStackPtrBig() local
288 MIB1.addImm(Amount).addImm(-1); in adjustStackPtrBig()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 1089 auto MIB1 = buildMI(MBB, MBBI, AVR::STSKRr); in expand() local
1100 MIB1.addGlobalAddress(GV, Offs + 1, TF); in expand()
1104 MIB1.addGlobalAddress(GV, Offs, TF); in expand()
1115 MIB1.addImm(Imm + 1); in expand()
1119 MIB1.addImm(Imm); in expand()
1132 MIB1.addReg(SrcHiReg, getKillRegState(SrcIsKill)) in expand()
1138 MIB1.addReg(SrcLoReg, getKillRegState(SrcIsKill)) in expand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLowOverheadLoops.cpp | 1748 auto MIB1 = BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(ARM::VMOVD), in Expand() local
1752 (void)MIB1; in Expand()
1753 LLVM_DEBUG(dbgs() << " into " << *MIB1); in Expand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2304 auto MIB1 = BuildMI(*MF, MIMetadata(Root), TII->get(InnerOpc), NewVR) in genShXAddAddShift() local
2313 InsInstrs.push_back(MIB1); in genShXAddAddShift()
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