Home
last modified time | relevance | path

Searched refs:MI0 (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CollectLOH.cpp291 const MachineInstr *MI0; ///< First instruction involved in the LOH. member
312 Info.MI0 = &MI; in handleUse()
318 Info.MI0 = &MI; in handleUse()
323 Info.MI0 = &MI; in handleUse()
329 Info.MI0 = &MI; in handleUse()
409 const MachineInstr *AddMI = Info.MI0; in handleADRP()
416 << '\t' << MI << '\t' << *Info.MI0); in handleADRP()
417 AFI.addLOHDirective(MCLOH_AdrpAdd, {&MI, Info.MI0}); in handleADRP()
422 if (supportLoadFromLiteral(*Info.MI0)) { in handleADRP()
424 << '\t' << MI << '\t' << *Info.MI0); in handleADRP()
[all …]
H A DAArch64MachineScheduler.cpp36 static bool mayOverlapWrite(const MachineInstr &MI0, const MachineInstr &MI1, in mayOverlapWrite() argument
38 const MachineOperand &Base0 = AArch64InstrInfo::getLdStBaseOp(MI0); in mayOverlapWrite()
45 int StoreSize0 = AArch64InstrInfo::getMemScale(MI0); in mayOverlapWrite()
47 Off0 = AArch64InstrInfo::hasUnscaledLdStOffset(MI0.getOpcode()) in mayOverlapWrite()
48 ? AArch64InstrInfo::getLdStOffsetOp(MI0).getImm() in mayOverlapWrite()
49 : AArch64InstrInfo::getLdStOffsetOp(MI0).getImm() * StoreSize0; in mayOverlapWrite()
54 const MachineInstr &MI = (Off0 < Off1) ? MI0 : MI1; in mayOverlapWrite()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp1635 auto MI0 = in expandLSLW4Rd() local
1641 MI0->getOperand(3).setIsDead(); in expandLSLW4Rd()
1721 auto MI0 = in expandLSLW12Rd() local
1727 MI0->getOperand(3).setIsDead(); in expandLSLW12Rd()
1833 auto MI0 = in expandLSRW4Rd() local
1839 MI0->getOperand(3).setIsDead(); in expandLSRW4Rd()
1919 auto MI0 = in expandLSRW12Rd() local
1925 MI0->getOperand(3).setIsDead(); in expandLSRW12Rd()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp1704 bool ARMBaseInstrInfo::produceSameValue(const MachineInstr &MI0, in produceSameValue() argument
1707 unsigned Opcode = MI0.getOpcode(); in produceSameValue()
1716 if (MI0.getNumOperands() != MI1.getNumOperands()) in produceSameValue()
1719 const MachineOperand &MO0 = MI0.getOperand(1); in produceSameValue()
1731 const MachineFunction *MF = MI0.getParent()->getParent(); in produceSameValue()
1752 if (MI0.getNumOperands() != MI1.getNumOperands()) in produceSameValue()
1755 Register Addr0 = MI0.getOperand(1).getReg(); in produceSameValue()
1770 for (unsigned i = 3, e = MI0.getNumOperands(); i != e; ++i) { in produceSameValue()
1772 const MachineOperand &MO0 = MI0.getOperand(i); in produceSameValue()
1780 return MI0.isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
H A DARMBaseInstrInfo.h241 bool produceSameValue(const MachineInstr &MI0, const MachineInstr &MI1,
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp462 bool TargetInstrInfo::produceSameValue(const MachineInstr &MI0, in produceSameValue() argument
465 return MI0.isIdenticalTo(MI1, MachineInstr::IgnoreVRegDefs); in produceSameValue()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h618 virtual bool produceSameValue(const MachineInstr &MI0,
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp5921 static bool hasMoreUses(const MachineInstr &MI0, const MachineInstr &MI1, in hasMoreUses() argument
5923 return std::distance(MRI.use_instr_nodbg_begin(MI0.getOperand(0).getReg()), in hasMoreUses()