Searched refs:MGB_DMAC_INTR_STS (Results 1 – 2 of 2) sorted by relevance
887 CSR_WRITE_REG(sc, MGB_DMAC_INTR_STS, dmac_enable); in mgb_intr_enable_all()902 CSR_WRITE_REG(sc, MGB_DMAC_INTR_STS, UINT32_MAX); in mgb_intr_disable_all()915 CSR_WRITE_REG(sc, MGB_DMAC_INTR_STS, MGB_DMAC_RX_INTR_ENBL(qid)); in mgb_rx_queue_intr_enable()930 CSR_WRITE_REG(sc, MGB_DMAC_INTR_STS, MGB_DMAC_TX_INTR_ENBL(qid)); in mgb_tx_queue_intr_enable()
117 #define MGB_DMAC_INTR_STS 0xC10 macro