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Searched refs:MGATHER (Results 1 – 15 of 15) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPNodes.def92 ADD_VVP_OP(VVP_GATHER, MGATHER) HANDLE_VP_TO_VVP(VP_GATHER, VVP_GATHER)
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1340 MGATHER, enumerator
H A DSelectionDAGNodes.h1436 case ISD::MGATHER:
1477 case ISD::MGATHER:
2920 return N->getOpcode() == ISD::MGATHER ||
2934 : MaskedGatherScatterSDNode(ISD::MGATHER, Order, dl, VTs, MemVT, MMO,
2946 return N->getOpcode() == ISD::MGATHER;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h883 MGATHER, enumerator
1862 return N->getOpcode() == X86ISD::MGATHER || in classof()
1872 return N->getOpcode() == X86ISD::MGATHER; in classof()
H A DX86ISelLowering.cpp1667 setOperationAction(ISD::MGATHER, MVT::v2f32, Custom); in X86TargetLowering()
1668 setOperationAction(ISD::MGATHER, MVT::v2i32, Custom); in X86TargetLowering()
1672 setOperationAction(ISD::MGATHER, VT, Custom); in X86TargetLowering()
2025 setOperationAction(ISD::MGATHER, VT, Custom); in X86TargetLowering()
2558 ISD::MGATHER, in X86TargetLowering()
26522 DAG.getMemIntrinsicNode(X86ISD::MGATHER, dl, VTs, Ops, in getAVX2GatherNode()
26560 DAG.getMemIntrinsicNode(X86ISD::MGATHER, dl, VTs, Ops, in getGatherNode()
32174 X86ISD::MGATHER, dl, DAG.getVTList(VT, MVT::Other), Ops, N->getMemoryVT(), in LowerMGATHER()
32497 case ISD::MGATHER: return LowerMGATHER(Op, Subtarget, DAG); in LowerOperation()
33562 case ISD::MGATHER: { in ReplaceNodeResults()
[all …]
H A DX86ISelDAGToDAG.cpp6333 case X86ISD::MGATHER: { in Select()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp435 case ISD::MGATHER: return "masked_gather"; in getOperationName()
H A DLegalizeVectorOps.cpp457 case ISD::MGATHER: in LegalizeOp()
H A DLegalizeVectorTypes.cpp1113 case ISD::MGATHER: in SplitVectorResult()
3169 case ISD::MGATHER: in SplitVectorOperand()
4360 case ISD::MGATHER: in WidenVectorResult()
6383 case ISD::MGATHER: Res = WidenVecOp_MGATHER(N, OpNo); break; in WidenVectorOperand()
H A DLegalizeIntegerTypes.cpp88 case ISD::MGATHER: Res = PromoteIntRes_MGATHER(cast<MaskedGatherSDNode>(N)); in PromoteIntegerResult()
1953 case ISD::MGATHER: Res = PromoteIntOp_MGATHER(cast<MaskedGatherSDNode>(N), in PromoteIntegerOperand()
H A DSelectionDAG.cpp876 case ISD::MGATHER: { in AddNodeIDCustom()
9727 AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops); in getMaskedGather()
H A DDAGCombiner.cpp1962 case ISD::MGATHER: return visitMGATHER(N); in visit()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp870 setOperationAction({ISD::MLOAD, ISD::MSTORE, ISD::MGATHER, ISD::MSCATTER}, in RISCVTargetLowering()
1009 setOperationAction({ISD::MLOAD, ISD::MSTORE, ISD::MGATHER, ISD::MSCATTER}, in RISCVTargetLowering()
1226 {ISD::MLOAD, ISD::MSTORE, ISD::MGATHER, ISD::MSCATTER}, VT, Custom); in RISCVTargetLowering()
1360 {ISD::MLOAD, ISD::MSTORE, ISD::MGATHER, ISD::MSCATTER}, VT, Custom); in RISCVTargetLowering()
1494 setTargetDAGCombine({ISD::FCOPYSIGN, ISD::MGATHER, ISD::MSCATTER, in RISCVTargetLowering()
7103 case ISD::MGATHER: in LowerOperation()
11875 // Custom lower MGATHER/VP_GATHER to a legalized form for RVV. It will then be
11903 // Else it must be a MGATHER. in lowerMaskedGather()
11919 "Unexpected extending MGATHER/VP_GATHER"); in lowerMaskedGather()
17062 case ISD::MGATHER in PerformDAGCombine()
[all...]
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td764 def masked_gather : SDNode<"ISD::MGATHER", SDTMaskedGather,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1117 setTargetDAGCombine({ISD::MGATHER, ISD::MSCATTER}); in AArch64TargetLowering()
1768 setOperationAction(ISD::MGATHER, VT, Custom); in AArch64TargetLowering()
2078 setOperationAction(ISD::MGATHER, VT, PreferSVE ? Default : Expand); in addTypeForFixedLengthSVE()
6946 case ISD::MGATHER: in LowerOperation()
25345 case ISD::MGATHER: in PerformDAGCombine()