Searched refs:MDIO_WC_REG_COMBO_IEEE0_MIICTRL (Results 1 – 2 of 2) sorted by relevance
3476 #define MDIO_WC_REG_COMBO_IEEE0_MIICTRL 0xffe0 macro
722 #define MDIO_WC_REG_COMBO_IEEE0_MIICTRL 0xffe0 macro5041 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, in elink_warpcore_set_sgmii_speed()5046 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); in elink_warpcore_set_sgmii_speed()5067 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, val16); in elink_warpcore_set_sgmii_speed()5072 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); in elink_warpcore_set_sgmii_speed()5146 {MDIO_WC_DEVAD, MDIO_WC_REG_COMBO_IEEE0_MIICTRL, 0x0140} in elink_warpcore_clear_regs()5446 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, 0xBFFF); in elink_warpcore_link_reset()5523 MDIO_WC_REG_COMBO_IEEE0_MIICTRL, in elink_set_warpcore_loopback()