Searched refs:MDIO_TX_PHYAD_S (Results 1 – 2 of 2) sorted by relevance
73 #define MDIO_TX_PHYAD_S 24 /* This controls the PHY address being accessed. */ macro74 #define MDIO_TX_PHYAD_M (0x1f << MDIO_TX_PHYAD_S)
709 mii |= (phy << MDIO_TX_PHYAD_S); in xae_miibus_read_reg()734 mii |= (phy << MDIO_TX_PHYAD_S); in xae_miibus_write_reg()