| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 31 namespace MCOI {
43 ((1 << MCOI::TIED_TO) | ((op) << (4 + MCOI::TIED_TO * 4)))
46 (1 << MCOI::EARLY_CLOBBER)
106 return Flags & (1 << MCOI::LookupPtrRegClass); in isLookupPtrRegClass()
111 bool isPredicate() const { return Flags & (1 << MCOI::Predicate); } in isPredicate()
114 bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); } in isOptionalDef()
117 bool isBranchTarget() const { return Flags & (1 << MCOI::BranchTarget); } in isBranchTarget()
120 return OperandType >= MCOI::OPERAND_FIRST_GENERIC && in isGenericType()
121 OperandType <= MCOI::OPERAND_LAST_GENERIC; in isGenericType()
126 return OperandType - MCOI::OPERAND_FIRST_GENERIC; in getGenericTypeIndex()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVVMV0Elimination.cpp | 76 static bool isVMV0(const MCOperandInfo &MCOI) { in isVMV0() argument
77 return MCOI.RegClass == RISCV::VMV0RegClassID; in isVMV0()
122 for (auto [OpNo, MCOI] : enumerate(MI.getDesc().operands())) { in runOnMachineFunction()
123 if (isVMV0(MCOI)) { in runOnMachineFunction()
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| H A D | RISCVAsmPrinter.cpp | 1106 assert(MCID.getOperandConstraint(OpNo, MCOI::TIED_TO) == 0 && in lowerRISCVVMachineInstrToMCInst()
1111 if (OutMCID.getOperandConstraint(OutMI.getNumOperands(), MCOI::TIED_TO) < in lowerRISCVVMachineInstrToMCInst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86BaseInfo.h | 71 OPERAND_ROUNDING_CONTROL = MCOI::OPERAND_FIRST_TARGET,
978 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) in getOperandBias()
982 if (NumOps == 8 && Desc.getOperandConstraint(6, MCOI::TIED_TO) == 0) in getOperandBias()
987 if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
988 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1) in getOperandBias()
992 if (NumOps == 9 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
993 (Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1 || in getOperandBias()
994 Desc.getOperandConstraint(8, MCOI::TIED_TO) == 1)) in getOperandBias()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYBaseInfo.h | 63 OPERAND_BARESYMBOL = MCOI::OPERAND_FIRST_TARGET,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCTargetDesc.cpp | 240 case MCOI::OPERAND_UNKNOWN: in evaluateBranch()
241 case MCOI::OPERAND_IMMEDIATE: { in evaluateBranch()
248 case MCOI::OPERAND_PCREL: in evaluateBranch()
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| H A D | MipsBaseInfo.h | 138 OPERAND_FIRST_MIPS_MEM_IMM = MCOI::OPERAND_FIRST_TARGET,
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.h | 453 SmallBitVector TypeIdxsCovered{MCOI::OPERAND_LAST_GENERIC -
454 MCOI::OPERAND_FIRST_GENERIC + 2};
455 SmallBitVector ImmIdxsCovered{MCOI::OPERAND_LAST_GENERIC_IMM -
456 MCOI::OPERAND_FIRST_GENERIC_IMM + 2};
461 (MCOI::OPERAND_LAST_GENERIC - MCOI::OPERAND_FIRST_GENERIC) && in typeIdx()
605 assert(ImmIdx <= (MCOI::OPERAND_LAST_GENERIC_IMM - in immIdx()
606 MCOI::OPERAND_FIRST_GENERIC_IMM) && in immIdx()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.h | 72 OPERAND_IMPLICIT_IMM_0 = MCOI::OPERAND_FIRST_TARGET,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/Disassembler/ |
| H A D | WebAssemblyDisassembler.cpp | 211 case MCOI::OPERAND_IMMEDIATE: { in getInstruction()
311 case MCOI::OPERAND_REGISTER: in getInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCTargetDesc.cpp | 106 MCOI::OPERAND_PCREL) { in evaluateBranch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCTargetDesc.h | 115 OPERAND_VPRED_R = MCOI::OPERAND_FIRST_TARGET,
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| H A D | ARMMCTargetDesc.cpp | 423 Desc.operands()[OpNum].OperandType == MCOI::OPERAND_PCREL) { in evaluateBranch()
583 Desc.operands()[OpIndex].OperandType != MCOI::OPERAND_MEMORY) in evaluateMemoryOperandAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVBaseInfo.h | 265 Desc.getOperandConstraint(Desc.getNumDefs(), MCOI::TIED_TO) == 0; in isFirstDefTiedToFirstUse()
296 OPERAND_FIRST_RISCV_IMM = MCOI::OPERAND_FIRST_TARGET,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCTargetDesc.cpp | 144 MCOI::OPERAND_PCREL) in evaluateBranch()
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| H A D | AMDGPUInstPrinter.cpp | 739 case MCOI::OPERAND_IMMEDIATE: in printRegularOperand()
772 case MCOI::OPERAND_UNKNOWN: in printRegularOperand()
773 case MCOI::OPERAND_PCREL: in printRegularOperand()
776 case MCOI::OPERAND_REGISTER: in printRegularOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 1424 const MCOperandInfo &MCOI = MCID.operands()[I]; in foldMemoryOperandImpl() local
1425 if (MCOI.OperandType != MCOI::OPERAND_REGISTER || I == OpNum) in foldMemoryOperandImpl()
1427 const TargetRegisterClass *RC = TRI->getRegClass(MCOI.RegClass); in foldMemoryOperandImpl()
2289 const MCOperandInfo &MCOI = MCID.operands()[I]; in verifyInstruction() local
2293 if (MCOI.OperandType == MCOI::OPERAND_MEMORY && in verifyInstruction()
2294 ((MCOI.RegClass != -1 && !Op.isReg() && !Op.isFI()) || in verifyInstruction()
2295 (MCOI.RegClass == -1 && !Op.isImm()))) { in verifyInstruction()
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| H A D | SystemZHazardRecognizer.cpp | 127 MID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in has4RegOps()
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| H A D | SystemZShortenInst.cpp | 66 if (MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 && in tieOpsIfNeeded()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineVerifier.cpp | 2517 const MCOperandInfo &MCOI = MCID.operands()[MONum]; in visitMachineOperand() local
2520 else if (!MO->isDef() && !MCOI.isOptionalDef()) in visitMachineOperand()
2525 const MCOperandInfo &MCOI = MCID.operands()[MONum]; in visitMachineOperand() local
2531 if (MO->isDef() && !MCOI.isOptionalDef() && !MCID.variadicOpsAreDefs()) in visitMachineOperand()
2538 if (MCOI.OperandType == MCOI::OPERAND_REGISTER && in visitMachineOperand()
2542 if (MCOI.OperandType == MCOI::OPERAND_IMMEDIATE || in visitMachineOperand()
2543 (MCOI.OperandType == MCOI::OPERAND_PCREL && in visitMachineOperand()
2549 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO); in visitMachineOperand()
2606 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO)) in visitMachineOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/ |
| H A D | WebAssemblyAsmTypeCheck.cpp | 676 if (Op.OperandType == MCOI::OPERAND_REGISTER) in typeCheck()
684 assert(Op.OperandType == MCOI::OPERAND_REGISTER && "Register expected"); in typeCheck()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/MCTargetDesc/ |
| H A D | SPIRVInstPrinter.cpp | 125 MCOI::OPERAND_UNKNOWN) { in printInst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| H A D | WebAssemblyMCTargetDesc.h | 44 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCTargetDesc.cpp | 462 MCOI::OPERAND_PCREL) in evaluateBranch()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 218 if (MCID.getOperandConstraint(I, MCOI::TIED_TO) != -1) in ClusterNeighboringLoads()
456 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in AddSchedEdges()
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