Searched refs:MASTER_CLK_SEL_DIS (Results 1 – 2 of 2) sorted by relevance
1329 (val & MASTER_CLK_SEL_DIS) == 0) { in alc_init_pcie()1330 val |= MASTER_WAKEN_25M | MASTER_CLK_SEL_DIS; in alc_init_pcie()1335 (val & MASTER_CLK_SEL_DIS) != 0) { in alc_init_pcie()1337 val &= ~MASTER_CLK_SEL_DIS; in alc_init_pcie()2552 CSR_READ_4(sc, ALC_MASTER_CFG) | MASTER_CLK_SEL_DIS); in alc_setwol_813x()2560 CSR_READ_4(sc, ALC_MASTER_CFG) & ~MASTER_CLK_SEL_DIS); in alc_setwol_813x()2583 CSR_READ_4(sc, ALC_MASTER_CFG) | MASTER_CLK_SEL_DIS); in alc_setwol_813x()2606 master &= ~MASTER_CLK_SEL_DIS; in alc_setwol_816x()3894 reg |= MASTER_CLK_SEL_DIS; in alc_reset()
190 #define MASTER_CLK_SEL_DIS 0x00001000 macro