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Searched refs:M8 (Results 1 – 25 of 25) sorted by relevance

/freebsd/crypto/openssl/crypto/modes/asm/
H A Dghash-riscv64-zvkb-zvbc.pl245 my ($Xi,$Htable,$inp,$len,$TMP0,$TMP1,$TMP2,$TMP3,$M8,$TMP5,$TMP6) = ("a0","a1","a2","a3","t0","t1"…
263 li $M8, -8
267 @{[vlse64_v $V5, $Xi, $M8]} # vlse64.v v5, (a0), t4
271 @{[vlse64_v $Vinp, $inp, $M8]} # vle64.v v0, (a2)
362 @{[vsse64_v $V5, $Xi, $M8]} # vsse64.v v2, (a0), t4
/freebsd/contrib/ntp/util/
H A Dtg2.c251 #define M8 (8) /* IRIG PI pulse */ macro
417 {NODEC, M8}, /* 9 PI */
433 {DEC, M8}, /* 10 PI */
449 {NODEC, M8}, /* 10 PI */
465 {DEC, M8}, /* 9 PI */
472 {MIN, M8}, /* 0 PI (on-time marker for the second at zero cross of 1st cycle) */
481 {DEC, M8}, /* 9 PI */
1637 poop(M8-1, 1000, LOW, UnmodulatedInverted);
1644 peep(M8-1, 1000, LOW);
1678 poop(M8+1, 1000, LOW, UnmodulatedInverted);
[all …]
H A Dtg.c77 #define M8 8 /* IRIG PI pulse */ macro
205 {DEC, M8}, /* 9 pi */
212 {MIN, M8}, /* 0 pi (second) */
221 {DEC, M8}, /* 9 pi */
477 peep(M8, 1000, LOW); in main()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSchedSiFiveP600.td33 !eq(mx, "M8") : 8,
71 !eq(mx, "M8") : 4,
76 int c = !if(!eq(mx, "M8"), 2, 1);
87 !eq(mx, "M8"): 8,
97 !eq(mx, "M8") : 10,
105 !eq(mx, "M8") : 6,
118 !eq(mx, "M8") : 24,
126 !eq(mx, "M8") : 11,
139 !eq(mx, "M8") : 30,
150 !eq(mx, "M8") : !mul(Base, 8),
[all …]
H A DRISCVScheduleXSf.td73 defm "" : LMULSchedWritesImpl<"WriteSF_VQMACC_DOD", ["M1", "M2", "M4", "M8"]>;
74 defm "" : LMULSchedReadsImpl<"ReadSF_VQMACC_DOD", ["M1", "M2", "M4", "M8"]>;
H A DRISCVSchedSiFiveP400.td33 !eq(mx, "M8") : 8,
82 !eq(mx, "M8"): !if(!eq(sew, 64), 11, 13),
87 !eq(mx, "M8"): !if(!eq(sew, 64), 10, 12),
101 !eq(mx, "M8"): 9,
111 !eq(mx, "M8"): !sub(23, !mul(2, !logtwo(sew))),
122 !eq(mx, "M8"): !div(!sub(241, !mul(23, !logtwo(sew))), 10),
130 !eq(mx, "M8") : 4,
486 let Latency = !if(!eq(mx, "M8"), 9, 6), ReleaseAtCycles = [LMulLat] in {
771 foreach mx = ["M2", "M4", "M8"] in {
814 foreach mx = ["M2", "M4", "M8"] in {
[all …]
H A DRISCVSchedSiFive7.td36 !eq(mx, "M8") : 16,
59 !eq(mx, "M8") : 2,
70 !eq(mx, "M8") : 2,
82 !eq(mx, "M8") : 32,
98 !eq(mx, "M8") : !div(!mul(VLEN, 8), sew),
119 !eq(mx, "M8") : !mul(numElements, 8),
146 !eq(mx, "M8") : 16,
164 !eq(mx, "M8") : !div(!mul(VLEN, 8), sew),
537 foreach mx = ["MF4", "MF2", "M1", "M2", "M4", "M8"] in {
554 foreach mx = ["MF2", "M1", "M2", "M4", "M8"] in {
[all …]
H A DRISCVScheduleV.td12 defvar SchedMxList = ["MF8", "MF4", "MF2", "M1", "M2", "M4", "M8"];
13 // Used for widening and narrowing instructions as it doesn't contain M8.
14 defvar SchedMxListW = !listremove(SchedMxList, ["M8"]);
15 // Used for widening reductions, which does contain M8.
17 defvar SchedMxListFW = !listremove(SchedMxList, ["M8", "MF8"]);
28 !eq(mx, "M8"): [8, 16, 32, 64],
481 // MF8 and M8. Use the _From suffix to indicate the number of the
H A DRISCVSchedSiFiveP800.td31 !eq(mx, "M8") : 8,
45 !eq(mx, "M8") : !div(!mul(VLEN, 8), sew),
56 !eq(mx, "M8") : 4,
717 foreach mx = ["M8", "M4", "M2"] in {
757 foreach mx = ["M2", "M4", "M8"] in {
765 foreach mx = ["M2", "M4", "M8"] in {
H A DRISCVInstrInfo.cpp3666 case CASE_RVV_OPCODE_UNMASK_LMUL(OP, M8)
3678 case CASE_RVV_OPCODE_MASK_LMUL(OP, M8)
3700 case CASE_VMA_OPCODE_COMMON(OP, TYPE, M8)
3710 case CASE_VFMA_OPCODE_COMMON(OP, TYPE, M8, SEW)
3908 CASE_VMA_CHANGE_OPCODE_COMMON(OLDOP, NEWOP, TYPE, M8)
3920 CASE_VFMA_CHANGE_OPCODE_COMMON(OLDOP, NEWOP, TYPE, M8, SEW)
H A DRISCVRegisterInfo.td520 // MF8 MF4 MF2 M1 M2 M4 M8
701 def V#Index#M8 : RISCVRegWithSubRegs<Index, "v"#Index,
H A DRISCVVectorPeephole.cpp360 CASE_VMERGE_TO_VMV(M8) in getVMV_V_VOpcodeForVMERGE_VVM()
H A DRISCVInstrInfoZvk.td213 …list<VTypeInfo> vs2_types = !cond(!eq(vd_lmul, "M8") : !filter(vti, I32IntegerVectors, !le(vti.LM…
223 list<LMULInfo> vs2_lmuls = !cond(!eq(vd_lmul, "M8") : [V_MF8, V_MF4, V_MF2, V_M1, V_M2, V_M4],
H A DRISCVInstrInfoXTHead.td489 def THVdotV_M8 : LMULInfo<0b011, 64, VRM8, VRM8, VRM4, VRM2, VR, "M8">;
H A DRISCVISelDAGToDAG.cpp1897 CASE_VMSLT_OPCODES(LMUL_8, M8) in Select()
1995 CASE_VMSLT_OPCODES(LMUL_8, M8) in Select()
H A DRISCVInstrInfoVPseudos.td185 def V_M8 : LMULInfo<0b011, 64, VRM8,/*NoVReg*/VR, VRM4, VRM2, VR, "M8">;
196 // Used for widening and narrowing instructions as it doesn't contain M8.
198 // Used for widening reductions. It can contain M8 because wider operands are
204 // contain M8 because wider operands are scalar operands.
258 !eq(octuple, 64): "M8");
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c209 xmmi M5, M6, M7, M8; in poly1305_blocks() local
406 M8 = _mm_unpackhi_epi32(T8, _mm_setzero_si128()); in poly1305_blocks()
409 M8 = _mm_slli_epi64(M8, 18); in poly1305_blocks()
413 T3 = _mm_add_epi64(T3, M8); in poly1305_blocks()
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-jaguar-ethernet-switch.dtso17 * RK3588 Jaguar can be powered entirely through the adapter via the M8 3-pin
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8974pro-htc-m8.dts8 model = "HTC One (M8)";
/freebsd/contrib/wpa/hostapd/
H A DREADME-MULTI-AP150 7. AP sends M8 with backhaul instead of fronthaul credentials.
/freebsd/contrib/file/tests/
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/freebsd/crypto/openssl/doc/designs/quic-design/images/
H A Dquic-concurrency-models.svg1 …M8.824-.471c.02.057.033.122.033.195 0 .281-.159.424-.472.424a.417.417 0 0 1-.424-.293L7.294-1.84H1…
/freebsd/contrib/sendmail/contrib/
H A Dmail.local.linux115 M*9Q`RU@UJR^.>XCS9IF8*9Q>>[1TH[01VBFW28E?(@:U*<S,-JP2&B`JT)M8
/freebsd/share/misc/
H A Dpci_vendors13604 17aa 1055 ThinkServer LPm16004B-M8-L AnyFabric
13649 10df f140 LPe12000-M8-L 1-Port 8Gb PCIe Fibre Channel Adapter
13650 10df f141 LPe12002-M8-L 2-Port 8Gb PCIe Fibre Channel Adapter
H A Dusb_vendors13922 0f25 One M8