Searched refs:LoadedVT (Results 1 – 7 of 7) sorted by relevance
1601 EVT LoadedVT = LD->getMemoryVT(); in tryARMIndexedLoad() local1606 if (LoadedVT == MVT::i32 && isPre && in tryARMIndexedLoad()1610 } else if (LoadedVT == MVT::i32 && !isPre && in tryARMIndexedLoad()1614 } else if (LoadedVT == MVT::i32 && in tryARMIndexedLoad()1619 } else if (LoadedVT == MVT::i16 && in tryARMIndexedLoad()1625 } else if (LoadedVT == MVT::i8 || LoadedVT == MVT::i1) { in tryARMIndexedLoad()1676 EVT LoadedVT = LD->getMemoryVT(); in tryT1IndexedLoad() local1679 LoadedVT.getSimpleVT().SimpleTy != MVT::i32) in tryT1IndexedLoad()1707 EVT LoadedVT = LD->getMemoryVT(); in tryT2IndexedLoad() local1714 switch (LoadedVT.getSimpleVT().SimpleTy) { in tryT2IndexedLoad()[all …]
909 EVT LoadedVT = LD->getMemoryVT(); in tryLoad() local916 if (!LoadedVT.isSimple()) in tryLoad()951 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoad()960 assert((Isv2x16VT(LoadedVT) || LoadedVT == MVT::v4i8) && in tryLoad()1054 EVT LoadedVT = MemSD->getMemoryVT(); in tryLoadVector() local1056 if (!LoadedVT.isSimple()) in tryLoadVector()1077 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoadVector()
81 EVT LoadedVT = LD->getMemoryVT(); in INITIALIZE_PASS() local88 bool IsValidInc = HII->isValidAutoIncImm(LoadedVT, Inc); in INITIALIZE_PASS()90 assert(LoadedVT.isSimple()); in INITIALIZE_PASS()91 switch (LoadedVT.getSimpleVT().SimpleTy) { in INITIALIZE_PASS()162 assert(LoadedVT.getSizeInBits() <= 32); in INITIALIZE_PASS()
290 EVT LoadedVT = LD->getMemoryVT(); in LegalizeOp() local291 if (LoadedVT.isVector() && ExtType != ISD::NON_EXTLOAD) in LegalizeOp()292 Action = TLI.getLoadExtAction(ExtType, LD->getValueType(0), LoadedVT); in LegalizeOp()
9792 EVT LoadedVT = LD->getMemoryVT(); in expandUnalignedLoad() local9797 EVT intVT = EVT::getIntegerVT(*DAG.getContext(), LoadedVT.getSizeInBits()); in expandUnalignedLoad()9798 if (isTypeLegal(intVT) && isTypeLegal(LoadedVT)) { in expandUnalignedLoad()9800 LoadedVT.isVector()) { in expandUnalignedLoad()9809 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad); in expandUnalignedLoad()9810 if (LoadedVT != VT) in expandUnalignedLoad()9820 unsigned LoadedBytes = LoadedVT.getStoreSize(); in expandUnalignedLoad()9825 SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT); in expandUnalignedLoad()9876 LoadedVT); in expandUnalignedLoad()9882 assert(LoadedVT.isInteger() && !LoadedVT.isVector() && in expandUnalignedLoad()[all …]
6425 EVT LoadedVT = LoadN->getMemoryVT(); in isAndLoadExtLoad() local6427 if (ExtVT == LoadedVT && in isAndLoadExtLoad()6441 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
5553 EVT LoadedVT = LD->getMemoryVT(); in Select() local5573 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()5574 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()5585 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()5586 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()5610 assert((!isSExt || LoadedVT == MVT::i16) && "Invalid sext update load"); in Select()5611 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()5622 assert((!isSExt || LoadedVT == MVT::i16 || LoadedVT == MVT::i32) && in Select()5624 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()