| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 524 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
542 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
|
| H A D | X86InstrInfo.cpp | 8746 bool X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
8749 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
8843 if (!IsLoadOpcode(Load1->getMachineOpcode()) || in areLoadsFromSameBasePtr()
8849 return Load1->getOperand(I) == Load2->getOperand(I); in areLoadsFromSameBasePtr()
8862 auto Disp1 = dyn_cast<ConstantSDNode>(Load1->getOperand(X86::AddrDisp)); in areLoadsFromSameBasePtr()
8872 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
8879 unsigned Opc1 = Load1->getMachineOpcode(); in shouldScheduleLoadsNear()
8895 EVT VT = Load1->getValueType(0); in shouldScheduleLoadsNear()
|
| H A D | X86ISelLowering.cpp | 52956 SDValue Load1 = in combineLoad() local
52964 Load1.getValue(1), Load2.getValue(1)); in combineLoad()
52966 SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2); in combineLoad()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 249 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
260 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
|
| H A D | ARMBaseInstrInfo.cpp | 1791 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1797 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
1823 if (!IsLoadOpcode(Load1->getMachineOpcode()) || in areLoadsFromSameBasePtr()
1828 if (Load1->getOperand(0) != Load2->getOperand(0) || in areLoadsFromSameBasePtr()
1829 Load1->getOperand(4) != Load2->getOperand(4)) in areLoadsFromSameBasePtr()
1833 if (Load1->getOperand(3) != Load2->getOperand(3)) in areLoadsFromSameBasePtr()
1837 if (isa<ConstantSDNode>(Load1->getOperand(1)) && in areLoadsFromSameBasePtr()
1839 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr()
1858 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
1874 if ((Load1->getMachineOpcode() != Load2->getMachineOpcode()) && in shouldScheduleLoadsNear()
[all …]
|
| H A D | ARMISelLowering.cpp | 13710 LoadSDNode *Load1 = dyn_cast<LoadSDNode>(N1); in TryDistrubutionADDVecReduce() local
13711 if (!Load0 || !Load1 || Load0->getChain() != Load1->getChain() || in TryDistrubutionADDVecReduce()
13712 !Load0->isSimple() || !Load1->isSimple() || Load0->isIndexed() || in TryDistrubutionADDVecReduce()
13713 Load1->isIndexed()) in TryDistrubutionADDVecReduce()
13717 auto BaseLocDecomp1 = BaseIndexOffset::match(Load1, DAG); in TryDistrubutionADDVecReduce()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1510 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1524 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 236 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
239 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
243 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr()
256 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
260 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
278 Offset1 = Load1->getConstantOperandVal(Offset1Idx); in areLoadsFromSameBasePtr()
289 if (NumOps != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
293 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
298 if (NumOps == 5 && Load0->getOperand(1) != Load1->getOperand(1)) in areLoadsFromSameBasePtr()
304 dyn_cast<ConstantSDNode>(Load1->getOperand(NumOps - 3)); in areLoadsFromSameBasePtr()
[all …]
|
| H A D | SIInstrInfo.h | 246 bool areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, int64_t &Offset0,
264 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 3269 SDValue Load1 = DAG.getLoad(LoadTy, dl, Chain, Base1, WideMMO); in LowerUnalignedLoad() local
3272 {Load1, Load0, BaseNoOff.getOperand(0)}); in LowerUnalignedLoad()
3274 Load0.getValue(1), Load1.getValue(1)); in LowerUnalignedLoad()
|
| H A D | HexagonISelLoweringHVX.cpp | 3031 SDValue Load1 = DAG.getLoad(SingleTy, dl, Chain, Base1, MOp1); in SplitHvxMemOp() local
3033 { DAG.getNode(ISD::CONCAT_VECTORS, dl, MemTy, Load0, Load1), in SplitHvxMemOp()
3035 Load0.getValue(1), Load1.getValue(1)) }, dl); in SplitHvxMemOp()
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | DataFlowSanitizer.cpp | 2309 Value *Load1 = in loadShadowOriginSansLoadTracking() local
2311 return {combineShadows(Load, Load1, Pos), Origin}; in loadShadowOriginSansLoadTracking()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13711 LoadSDNode *Load1 = cast<LoadSDNode>(Op1); in tryToFoldExtendSelectLoad() local
13713 if (!TLI.isLoadExtLegal(ExtLoadOpcode, VT, Load1->getMemoryVT()) || in tryToFoldExtendSelectLoad()
|