| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 476 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
494 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
|
| H A D | X86InstrInfo.cpp | 8651 bool X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
8654 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
8748 if (!IsLoadOpcode(Load1->getMachineOpcode()) || in areLoadsFromSameBasePtr()
8754 return Load1->getOperand(I) == Load2->getOperand(I); in areLoadsFromSameBasePtr()
8767 auto Disp1 = dyn_cast<ConstantSDNode>(Load1->getOperand(X86::AddrDisp)); in areLoadsFromSameBasePtr()
8777 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
8784 unsigned Opc1 = Load1->getMachineOpcode(); in shouldScheduleLoadsNear()
8800 EVT VT = Load1->getValueType(0); in shouldScheduleLoadsNear()
|
| H A D | X86ISelLowering.cpp | 51243 SDValue Load1 = in combineLoad() local
51252 Load1.getValue(1), Load2.getValue(1)); in combineLoad()
51254 SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2); in combineLoad()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 252 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
263 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
|
| H A D | ARMBaseInstrInfo.cpp | 1948 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1954 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
1980 if (!IsLoadOpcode(Load1->getMachineOpcode()) || in areLoadsFromSameBasePtr()
1985 if (Load1->getOperand(0) != Load2->getOperand(0) || in areLoadsFromSameBasePtr()
1986 Load1->getOperand(4) != Load2->getOperand(4)) in areLoadsFromSameBasePtr()
1990 if (Load1->getOperand(3) != Load2->getOperand(3)) in areLoadsFromSameBasePtr()
1994 if (isa<ConstantSDNode>(Load1->getOperand(1)) && in areLoadsFromSameBasePtr()
1996 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr()
2015 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
2031 if ((Load1->getMachineOpcode() != Load2->getMachineOpcode()) && in shouldScheduleLoadsNear()
[all …]
|
| H A D | ARMISelLowering.cpp | 13643 LoadSDNode *Load1 = dyn_cast<LoadSDNode>(N1); in TryDistrubutionADDVecReduce() local
13644 if (!Load0 || !Load1 || Load0->getChain() != Load1->getChain() || in TryDistrubutionADDVecReduce()
13645 !Load0->isSimple() || !Load1->isSimple() || Load0->isIndexed() || in TryDistrubutionADDVecReduce()
13646 Load1->isIndexed()) in TryDistrubutionADDVecReduce()
13650 auto BaseLocDecomp1 = BaseIndexOffset::match(Load1, DAG); in TryDistrubutionADDVecReduce()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1444 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1458 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 230 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
233 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
237 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr()
250 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
254 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
272 Offset1 = Load1->getConstantOperandVal(Offset1Idx); in areLoadsFromSameBasePtr()
283 if (NumOps != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
287 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
292 if (NumOps == 5 && Load0->getOperand(1) != Load1->getOperand(1)) in areLoadsFromSameBasePtr()
298 dyn_cast<ConstantSDNode>(Load1->getOperand(NumOps - 3)); in areLoadsFromSameBasePtr()
[all …]
|
| H A D | SIInstrInfo.h | 237 bool areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, int64_t &Offset0,
253 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 3247 SDValue Load1 = DAG.getLoad(LoadTy, dl, Chain, Base1, WideMMO); in LowerUnalignedLoad() local
3250 {Load1, Load0, BaseNoOff.getOperand(0)}); in LowerUnalignedLoad()
3252 Load0.getValue(1), Load1.getValue(1)); in LowerUnalignedLoad()
|
| H A D | HexagonISelLoweringHVX.cpp | 2994 SDValue Load1 = DAG.getLoad(SingleTy, dl, Chain, Base1, MOp1); in SplitHvxMemOp() local
2996 { DAG.getNode(ISD::CONCAT_VECTORS, dl, MemTy, Load0, Load1), in SplitHvxMemOp()
2998 Load0.getValue(1), Load1.getValue(1)) }, dl); in SplitHvxMemOp()
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | DataFlowSanitizer.cpp | 2319 Value *Load1 = in loadShadowOriginSansLoadTracking() local
2321 return {combineShadows(Load, Load1, Pos), Origin}; in loadShadowOriginSansLoadTracking()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 12848 LoadSDNode *Load1 = cast<LoadSDNode>(Op1); in tryToFoldExtendSelectLoad() local
12850 if (!TLI.isLoadExtLegal(ExtLoadOpcode, VT, Load1->getMemoryVT()) || in tryToFoldExtendSelectLoad()
|