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Searched refs:Load0 (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp236 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
239 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
242 unsigned Opc0 = Load0->getMachineOpcode(); in areLoadsFromSameBasePtr()
256 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
260 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
277 Offset0 = Load0->getConstantOperandVal(Offset0Idx); in areLoadsFromSameBasePtr()
288 unsigned NumOps = getNumOperandsNoGlue(Load0); in areLoadsFromSameBasePtr()
293 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
298 if (NumOps == 5 && Load0->getOperand(1) != Load1->getOperand(1)) in areLoadsFromSameBasePtr()
302 dyn_cast<ConstantSDNode>(Load0->getOperand(NumOps - 3)); in areLoadsFromSameBasePtr()
[all …]
H A DSIInstrInfo.h246 bool areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, int64_t &Offset0,
264 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3268 SDValue Load0 = DAG.getLoad(LoadTy, dl, Chain, Base0, WideMMO); in LowerUnalignedLoad() local
3272 {Load1, Load0, BaseNoOff.getOperand(0)}); in LowerUnalignedLoad()
3274 Load0.getValue(1), Load1.getValue(1)); in LowerUnalignedLoad()
H A DHexagonISelLoweringHVX.cpp3030 SDValue Load0 = DAG.getLoad(SingleTy, dl, Chain, Base0, MOp0); in SplitHvxMemOp() local
3033 { DAG.getNode(ISD::CONCAT_VECTORS, dl, MemTy, Load0, Load1), in SplitHvxMemOp()
3035 Load0.getValue(1), Load1.getValue(1)) }, dl); in SplitHvxMemOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp13709 LoadSDNode *Load0 = dyn_cast<LoadSDNode>(N0); in TryDistrubutionADDVecReduce() local
13711 if (!Load0 || !Load1 || Load0->getChain() != Load1->getChain() || in TryDistrubutionADDVecReduce()
13712 !Load0->isSimple() || !Load1->isSimple() || Load0->isIndexed() || in TryDistrubutionADDVecReduce()
13716 auto BaseLocDecomp0 = BaseIndexOffset::match(Load0, DAG); in TryDistrubutionADDVecReduce()