Searched refs:LoSrc (Results 1 – 3 of 3) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 3158 SDValue LoSrc = stripExtractLoElt(stripBitcast(Elts[i])); in buildRegSequence16() local 3160 if (isExtractHiElt(Elts[i + 1], HiSrc) && LoSrc == HiSrc) { in buildRegSequence16()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 4485 /// higher elements to lower elements. \p LoSrc indicates the first source 4487 /// of the rotate or -1 for undef. At least one of \p LoSrc and \p HiSrc will be 4493 static int isElementRotate(int &LoSrc, int &HiSrc, ArrayRef<int> Mask) { in isElementRotate() 4504 LoSrc = -1; in isElementRotate() 4534 int &TargetSrc = StartIdx < 0 ? HiSrc : LoSrc; in isElementRotate() 4548 assert((LoSrc >= 0 || HiSrc >= 0) && in isElementRotate() 5217 int LoSrc, HiSrc; in lowerVECTOR_SHUFFLE() 5218 int Rotation = isElementRotate(LoSrc, HiSrc, Mask); in lowerVECTOR_SHUFFLE() 5221 if (LoSrc >= 0) { in lowerVECTOR_SHUFFLE() 5222 LoV = LoSrc in lowerVECTOR_SHUFFLE() 4492 isElementRotate(int & LoSrc,int & HiSrc,ArrayRef<int> Mask) isElementRotate() argument 5216 int LoSrc, HiSrc; lowerVECTOR_SHUFFLE() local [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 8577 SDValue LoSrc = extract128BitVector(SrcVec, 0, DAG, DL); in createVariablePermute() local 8583 DAG.getNode(X86ISD::VPPERM, DL, MVT::v16i8, LoSrc, HiSrc, LoIdx), in createVariablePermute() 8584 DAG.getNode(X86ISD::VPPERM, DL, MVT::v16i8, LoSrc, HiSrc, HiIdx)); in createVariablePermute()
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