Searched refs:LoOps (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 3583 SDValue LoOps[2] = { LHSL, RHSL }; in ExpandIntRes_ADDSUB() local
3592 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3598 Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3620 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3624 Lo = DAG.getNode(ISD::SUBC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3643 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3647 Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3668 Lo = DAG.getNode(ISD::ADD, dl, NVT, LoOps); in ExpandIntRes_ADDSUB()
3672 if (isOneConstant(LoOps[1])) in ExpandIntRes_ADDSUB()
3675 else if (isAllOnesConstant(LoOps[1])) { in ExpandIntRes_ADDSUB()
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| H A D | LegalizeVectorTypes.cpp | 1617 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts); in SplitVecRes_BUILD_VECTOR() local
1618 Lo = DAG.getBuildVector(LoVT, dl, LoOps); in SplitVecRes_BUILD_VECTOR()
1638 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors); in SplitVecRes_CONCAT_VECTORS() local
1639 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, LoOps); in SplitVecRes_CONCAT_VECTORS()
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| H A D | TargetLowering.cpp | 12290 SmallVector<SDValue, 4> LoOps, HiOps; in expandVectorNaryOpBySplitting() local
12293 LoOps.push_back(Lo); in expandVectorNaryOpBySplitting()
12297 SDValue SplitOpLo = DAG.getNode(Opcode, DL, LoVT, LoOps); in expandVectorNaryOpBySplitting()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4245 SmallVector<SDValue, 8> LoOps; in performSraCombine() local
4249 DAG.ExtractVectorElements(NewShift, LoOps, 0, NElts); in performSraCombine()
4252 HiAndLoOps[2 * I] = LoOps[I]; in performSraCombine()
4352 SmallVector<SDValue, 8> LoOps; in performSrlCombine() local
4355 DAG.ExtractVectorElements(NewShift, LoOps, 0, NElts); in performSrlCombine()
4357 HiAndLoOps[2 * I] = LoOps[I]; in performSrlCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4282 SmallVector<SDValue, 2> LoOps, HiOps; in collectConcatOps() local
4283 if (collectConcatOps(Lo.getNode(), LoOps, DAG) && in collectConcatOps()
4285 LoOps.size() == HiOps.size()) { in collectConcatOps()
4286 Ops.append(LoOps); in collectConcatOps()
4374 SmallVector<SDValue, 2> LoOps(SubOps.begin(), SubOps.begin() + HalfOps); in splitVector() local
4376 SDValue Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, LoOps); in splitVector()
4397 SmallVector<SDValue> LoOps(NumOps, SDValue()); in splitVectorOp() local
4402 LoOps[I] = HiOps[I] = SrcOp; in splitVectorOp()
4405 std::tie(LoOps[I], HiOps[I]) = splitVector(SrcOp, DAG, dl); in splitVectorOp()
4411 DAG.getNode(Op.getOpcode(), dl, LoVT, LoOps), in splitVectorOp()
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