Searched refs:LoOpc (Results 1 – 5 of 5) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 178 unsigned LoOpc = LowRegInst.getOpcode(); in areCombinableOperations() local
191 verifyOpc(LoOpc); in areCombinableOperations()
193 if (HiOpc == Hexagon::V6_vassign || LoOpc == Hexagon::V6_vassign) in areCombinableOperations()
194 return HiOpc == LoOpc; in areCombinableOperations()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.h | 100 unsigned LoOpc, unsigned HiOpc,
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| H A D | MipsSEInstrInfo.cpp | 699 unsigned LoOpc, in expandPseudoMTLoHi() argument
710 MachineInstrBuilder LoInst = BuildMI(MBB, I, DL, get(LoOpc)); in expandPseudoMTLoHi()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 3512 ISD::NodeType LoOpc; in ExpandIntRes_MINMAX() local
3514 std::tie(CondC, LoOpc) = getExpandedMinMaxOps(N->getOpcode()); in ExpandIntRes_MINMAX()
3526 SDValue LoMinMax = DAG.getNode(LoOpc, DL, NVT, {LHSL, RHSL}); in ExpandIntRes_MINMAX()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 5362 unsigned LoOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in EmitInstrWithCustomInserter() local
5364 BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0) in EmitInstrWithCustomInserter()
5433 unsigned LoOpc = in EmitInstrWithCustomInserter() local
5435 MachineInstr *LoHalf = BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0) in EmitInstrWithCustomInserter()
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