| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ExecutionDomainFix.cpp | 72 assert(!LiveRegs.empty() && "Must enter basic block first."); in setLiveReg()
74 if (LiveRegs[rx] == dv) in setLiveReg()
76 if (LiveRegs[rx]) in setLiveReg()
77 release(LiveRegs[rx]); in setLiveReg()
78 LiveRegs[rx] = retain(dv); in setLiveReg()
83 assert(!LiveRegs.empty() && "Must enter basic block first."); in kill()
84 if (!LiveRegs[rx]) in kill()
87 release(LiveRegs[rx]); in kill()
88 LiveRegs[rx] = nullptr; in kill()
93 assert(!LiveRegs.empty() && "Must enter basic block first."); in force()
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| H A D | LivePhysRegs.cpp | 33 RegisterSet::iterator LRI = LiveRegs.begin(); in removeRegsInMask()
34 while (LRI != LiveRegs.end()) { in removeRegsInMask()
38 LRI = LiveRegs.erase(LRI); in removeRegsInMask()
143 if (LiveRegs.count(Reg.id())) in available()
148 if (LiveRegs.count(*R)) in available()
174 static void addCalleeSavedRegs(LivePhysRegs &LiveRegs, in addCalleeSavedRegs() argument
178 LiveRegs.addReg(*CSR); in addCalleeSavedRegs()
248 void llvm::computeLiveIns(LivePhysRegs &LiveRegs, in computeLiveIns() argument
253 LiveRegs.init(TRI); in computeLiveIns()
254 LiveRegs.addLiveOutsNoPristines(MBB); in computeLiveIns()
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| H A D | ReachingDefAnalysis.cpp | 78 if (LiveRegs.empty()) in enterBasicBlock()
79 LiveRegs.assign(NumRegUnits, ReachingDefDefaultVal); in enterBasicBlock()
88 if (LiveRegs[Unit] != -1) { in enterBasicBlock()
89 LiveRegs[Unit] = -1; in enterBasicBlock()
110 LiveRegs[Unit] = std::max(LiveRegs[Unit], Incoming[Unit]); in enterBasicBlock()
115 if (LiveRegs[Unit] != ReachingDefDefaultVal) in enterBasicBlock()
116 MBBReachingDefs.append(MBBNumber, Unit, LiveRegs[Unit]); in enterBasicBlock()
120 assert(!LiveRegs.empty() && "Must enter basic block first."); in leaveBasicBlock()
125 MBBOutRegsInfos[MBBNumber] = LiveRegs; in leaveBasicBlock()
134 LiveRegs.clear(); in leaveBasicBlock()
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| H A D | StackMapLivenessAnalysis.cpp | 52 LivePhysRegs LiveRegs; member in __anond8c955350111::StackMapLiveness
127 LiveRegs.init(*TRI); in calculateLiveness()
128 LiveRegs.addLiveOuts(MBB); in calculateLiveness()
139 LLVM_DEBUG(dbgs() << " " << LiveRegs << " " << MI); in calculateLiveness()
140 LiveRegs.stepBackward(MI); in calculateLiveness()
162 for (auto Reg : LiveRegs) in createRegisterMask()
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| H A D | RegisterPressure.cpp | 252 LiveRegs.clear(); in reset()
285 LiveRegs.init(*MRI); in init()
322 P.LiveInRegs.reserve(LiveRegs.size()); in closeTop()
323 LiveRegs.appendTo(P.LiveInRegs); in closeTop()
334 P.LiveOutRegs.reserve(LiveRegs.size()); in closeBottom()
335 LiveRegs.appendTo(P.LiveOutRegs); in closeBottom()
341 assert(LiveRegs.size() == 0 && "no region boundary"); in closeRegion()
695 LaneBitmask PrevMask = LiveRegs.insert(P); in addLiveRegs()
734 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs()
740 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs()
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| H A D | ScheduleDAGInstrs.cpp | 1125 static void toggleKills(const MachineRegisterInfo &MRI, LiveRegUnits &LiveRegs, in toggleKills() argument
1135 bool IsKill = LiveRegs.available(Reg); in toggleKills()
1140 LiveRegs.addReg(Reg); in toggleKills()
1147 LiveRegs.init(*TRI); in fixupKills()
1148 LiveRegs.addLiveOuts(MBB); in fixupKills()
1166 LiveRegs.removeReg(Reg); in fixupKills()
1168 LiveRegs.removeRegsNotPreserved(MO.getRegMask()); in fixupKills()
1174 toggleKills(MRI, LiveRegs, MI, true); in fixupKills()
1178 toggleKills(MRI, LiveRegs, MI, false); in fixupKills()
1188 toggleKills(MRI, LiveRegs, *I, true); in fixupKills()
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| H A D | BranchRelaxation.cpp | 90 LivePhysRegs LiveRegs; member in __anon6cb7e2b90111::BranchRelaxation
340 computeAndAddLiveIns(LiveRegs, *NewBB); in splitBlockBeforeInstr()
415 computeAndAddLiveIns(LiveRegs, *NewBB); in fixupConditionalBranch()
661 computeAndAddLiveIns(LiveRegs, *RestoreBB); in fixupUnconditionalBranch()
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| H A D | BranchFolding.cpp | 392 LiveRegs.clear(); in replaceTailWithBranchTo()
393 LiveRegs.addLiveOuts(OldMBB); in replaceTailWithBranchTo()
398 LiveRegs.stepBackward(*I); in replaceTailWithBranchTo()
410 if (!LiveRegs.available(*MRI, Reg)) in replaceTailWithBranchTo()
452 computeAndAddLiveIns(LiveRegs, *NewMBB); in SplitMBBAt()
875 LiveRegs.init(*TRI); in mergeCommonTails()
880 LiveRegs.clear(); in mergeCommonTails()
881 LiveRegs.addLiveOuts(*Pred); in mergeCommonTails()
884 if (!LiveRegs.available(*MRI, Reg)) in mergeCommonTails()
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| H A D | BranchFolding.h | 128 LivePhysRegs LiveRegs; variable
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LivePhysRegs.h | 55 RegisterSet LiveRegs; variable
63 LiveRegs.setUniverse(TRI.getNumRegs()); in LivePhysRegs()
72 LiveRegs.clear(); in init()
73 LiveRegs.setUniverse(TRI.getNumRegs()); in init()
77 void clear() { LiveRegs.clear(); } in clear()
80 bool empty() const { return LiveRegs.empty(); } in empty()
87 LiveRegs.insert(SubReg); in addReg()
96 LiveRegs.erase((*R).id()); in removeReg()
109 bool contains(MCRegister Reg) const { return LiveRegs.count(Reg.id()); } in contains()
158 const_iterator begin() const { return LiveRegs.begin(); } in begin()
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| H A D | ExecutionDomainFix.h | 129 LiveRegsDVInfo LiveRegs; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 457 GCNRPTracker::LiveRegSet LiveRegs; in getLiveRegs() local
464 LiveRegs[Reg] = LiveMask; in getLiveRegs()
466 return LiveRegs; in getLiveRegs()
475 if (&LiveRegs != LiveRegsCopy) in reset()
476 LiveRegs = *LiveRegsCopy; in reset()
478 LiveRegs = After ? getLiveRegsAfter(MI, LIS) in reset()
482 MaxPressure = CurPressure = getRegPressure(*MRI, LiveRegs); in reset()
488 LiveRegs = LiveRegs_; in reset()
532 auto I = LiveRegs.find(Reg); in recede()
533 if (I == LiveRegs.end()) in recede()
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| H A D | GCNRegPressure.h | 269 LiveRegSet LiveRegs; variable
288 const decltype(LiveRegs) &getLiveRegs() const { return LiveRegs; } in decltype() argument
295 decltype(LiveRegs) moveLiveRegs() { in moveLiveRegs()
296 return std::move(LiveRegs); in moveLiveRegs()
374 bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
495 Range &&LiveRegs) { in getRegPressure() argument
497 for (const auto &RM : LiveRegs) in getRegPressure()
508 Printable print(const GCNRPTracker::LiveRegSet &LiveRegs,
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| H A D | SIMachineScheduler.cpp | 1562 DAG->fillVgprSgprCost(LiveRegs.begin(), LiveRegs.end(), in pickBlock()
1572 for (Register Reg : LiveRegs) in pickBlock()
1634 (void) LiveRegs.insert(Reg); in addLiveRegs()
1642 std::set<Register>::iterator Pos = LiveRegs.find(Reg); in decreaseLiveRegs()
1643 assert (Pos != LiveRegs.end() && // Reg must be live. in decreaseLiveRegs()
1648 LiveRegs.erase(Pos); in decreaseLiveRegs()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandAtomicPseudoInsts.cpp | 349 LivePhysRegs LiveRegs; in expandAtomicBinOp() local
350 computeAndAddLiveIns(LiveRegs, *LoopMBB); in expandAtomicBinOp()
351 computeAndAddLiveIns(LiveRegs, *DoneMBB); in expandAtomicBinOp()
490 LivePhysRegs LiveRegs; in expandAtomicMinMaxOp() local
491 computeAndAddLiveIns(LiveRegs, *LoopHeadMBB); in expandAtomicMinMaxOp()
492 computeAndAddLiveIns(LiveRegs, *LoopIfBodyMBB); in expandAtomicMinMaxOp()
493 computeAndAddLiveIns(LiveRegs, *LoopTailMBB); in expandAtomicMinMaxOp()
494 computeAndAddLiveIns(LiveRegs, *DoneMBB); in expandAtomicMinMaxOp()
630 LivePhysRegs LiveRegs; in expandAtomicCmpXchg() local
631 computeAndAddLiveIns(LiveRegs, *LoopHeadMBB); in expandAtomicCmpXchg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZShortenInst.cpp | 48 LiveRegUnits LiveRegs; member in __anon84a548b40111::SystemZShortenInst
88 if (!LiveRegs.available(OtherReg)) in shortenIIF()
143 if (LiveRegs.available(SystemZ::CC) && shortenOn001(MI, Opcode)) { in shortenOn001AddCC()
208 LiveRegs.clear(); in processBlock()
209 LiveRegs.addLiveOuts(MBB); in processBlock()
377 LiveRegs.stepBackward(MI); in processBlock()
390 LiveRegs.init(*TRI); in runOnMachineFunction()
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| H A D | SystemZPostRewrite.cpp | 184 LivePhysRegs LiveRegs(TII->getRegisterInfo()); in expandCondMove() local
185 LiveRegs.addLiveOuts(MBB); in expandCondMove()
187 LiveRegs.stepBackward(*I); in expandCondMove()
194 for (MCPhysReg R : LiveRegs) in expandCondMove()
201 for (MCPhysReg R : LiveRegs) in expandCondMove()
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| H A D | SystemZElimCompare.cpp | 697 LiveRegUnits LiveRegs(*TRI); in processBlock() local
698 LiveRegs.addLiveOuts(MBB); in processBlock()
699 bool CompleteCCUsers = LiveRegs.available(SystemZ::CC); in processBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 190 LivePhysRegs LiveRegs; in expandAtomicCmpSwapSubword() local
191 computeAndAddLiveIns(LiveRegs, *loop1MBB); in expandAtomicCmpSwapSubword()
192 computeAndAddLiveIns(LiveRegs, *loop2MBB); in expandAtomicCmpSwapSubword()
193 computeAndAddLiveIns(LiveRegs, *sinkMBB); in expandAtomicCmpSwapSubword()
194 computeAndAddLiveIns(LiveRegs, *exitMBB); in expandAtomicCmpSwapSubword()
291 LivePhysRegs LiveRegs; in expandAtomicCmpSwap() local
292 computeAndAddLiveIns(LiveRegs, *loop1MBB); in expandAtomicCmpSwap()
293 computeAndAddLiveIns(LiveRegs, *loop2MBB); in expandAtomicCmpSwap()
294 computeAndAddLiveIns(LiveRegs, *exitMBB); in expandAtomicCmpSwap()
692 LivePhysRegs LiveRegs; in expandAtomicBinOpSubword() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 418 LivePhysRegs LiveRegs; in expandAtomicBinOp() local
419 computeAndAddLiveIns(LiveRegs, *LoopMBB); in expandAtomicBinOp()
420 computeAndAddLiveIns(LiveRegs, *DoneMBB); in expandAtomicBinOp()
548 LivePhysRegs LiveRegs; in expandAtomicMinMaxOp() local
549 computeAndAddLiveIns(LiveRegs, *LoopHeadMBB); in expandAtomicMinMaxOp()
550 computeAndAddLiveIns(LiveRegs, *LoopIfBodyMBB); in expandAtomicMinMaxOp()
551 computeAndAddLiveIns(LiveRegs, *LoopTailMBB); in expandAtomicMinMaxOp()
552 computeAndAddLiveIns(LiveRegs, *DoneMBB); in expandAtomicMinMaxOp()
721 LivePhysRegs LiveRegs; in expandAtomicCmpXchg() local
722 computeAndAddLiveIns(LiveRegs, *LoopHeadMBB); in expandAtomicCmpXchg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMIPeephole.cpp | 613 LivePhysRegs &LiveRegs, MachineBasicBlock &BB, in collectBPFFastCalls() argument
615 LiveRegs.init(*TRI); in collectBPFFastCalls()
616 LiveRegs.addLiveOuts(BB); in collectBPFFastCalls()
624 DoSpillFill |= !MI.definesRegister(SR, TRI) && LiveRegs.contains(SR); in collectBPFFastCalls()
632 LiveRegs.stepBackward(MI); in collectBPFFastCalls()
653 LivePhysRegs LiveRegs; in insertMissingCallerSavedSpills() local
658 collectBPFFastCalls(TRI, LiveRegs, BB, Calls); in insertMissingCallerSavedSpills()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 302 LivePhysRegs LiveRegs; in expandCMP_SWAP() local
303 computeAndAddLiveIns(LiveRegs, *DoneBB); in expandCMP_SWAP()
304 computeAndAddLiveIns(LiveRegs, *StoreBB); in expandCMP_SWAP()
305 computeAndAddLiveIns(LiveRegs, *LoadCmpBB); in expandCMP_SWAP()
308 computeAndAddLiveIns(LiveRegs, *StoreBB); in expandCMP_SWAP()
310 computeAndAddLiveIns(LiveRegs, *LoadCmpBB); in expandCMP_SWAP()
434 LivePhysRegs LiveRegs; in expandCMP_SWAP_128() local
435 computeAndAddLiveIns(LiveRegs, *DoneBB); in expandCMP_SWAP_128()
436 computeAndAddLiveIns(LiveRegs, *FailBB); in expandCMP_SWAP_128()
437 computeAndAddLiveIns(LiveRegs, *StoreBB); in expandCMP_SWAP_128()
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| H A D | AArch64FrameLowering.cpp | 1083 static void getLiveRegsForEntryMBB(LivePhysRegs &LiveRegs, in getLiveRegsForEntryMBB() argument
1086 LiveRegs.addLiveIns(MBB); in getLiveRegsForEntryMBB()
1090 LiveRegs.addReg(CSRegs[i]); in getLiveRegsForEntryMBB()
1117 LivePhysRegs LiveRegs(TRI); in findScratchNonCalleeSaveRegister() local
1118 getLiveRegsForEntryMBB(LiveRegs, *MBB); in findScratchNonCalleeSaveRegister()
1120 LiveRegs.addReg(AArch64::X16); in findScratchNonCalleeSaveRegister()
1121 LiveRegs.addReg(AArch64::X17); in findScratchNonCalleeSaveRegister()
1122 LiveRegs.addReg(AArch64::X18); in findScratchNonCalleeSaveRegister()
1127 if (LiveRegs.available(MRI, AArch64::X9)) in findScratchNonCalleeSaveRegister()
1131 if (LiveRegs.available(MRI, Reg)) in findScratchNonCalleeSaveRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 90 const LivePhysRegs &LiveRegs,
94 const LivePhysRegs &LiveRegs,
98 const LivePhysRegs &LiveRegs);
1403 const LivePhysRegs &LiveRegs, SmallVectorImpl<unsigned> &ScratchRegs) { in CMSESaveClearFPRegs() argument
1405 CMSESaveClearFPRegsV81(MBB, MBBI, DL, LiveRegs); in CMSESaveClearFPRegs()
1407 CMSESaveClearFPRegsV8(MBB, MBBI, DL, LiveRegs, ScratchRegs); in CMSESaveClearFPRegs()
1413 const LivePhysRegs &LiveRegs, SmallVectorImpl<unsigned> &ScratchRegs) { in CMSESaveClearFPRegsV8() argument
1501 bool S0Dead = !LiveRegs.contains(ARM::S0); in CMSESaveClearFPRegsV8()
1520 MO.setIsUndef(!LiveRegs.contains(Reg)); in CMSESaveClearFPRegsV8()
1595 const LivePhysRegs &LiveRegs) { in CMSESaveClearFPRegsV81() argument
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| H A D | ARMBlockPlacement.cpp | 138 LivePhysRegs LiveRegs; in revertWhileToDoLoop() local
139 computeAndAddLiveIns(LiveRegs, *NewBlock); in revertWhileToDoLoop()
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