Searched refs:LiveMask (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 302 LaneBitmask LiveMask; in getLiveLaneMask() local
306 LiveMask |= S.LaneMask; in getLiveLaneMask()
307 assert(LiveMask == (LiveMask & MRI.getMaxLaneMaskForVReg(LI.reg()))); in getLiveLaneMask()
310 LiveMask = MRI.getMaxLaneMaskForVReg(LI.reg()); in getLiveLaneMask()
312 return LiveMask; in getLiveLaneMask()
323 auto LiveMask = getLiveLaneMask(Reg, SI, LIS, MRI); in getLiveRegs() local
324 if (LiveMask.any()) in getLiveRegs()
325 LiveRegs[Reg] = LiveMask; in getLiveRegs()
386 LaneBitmask &LiveMask = I->second; in recede() local
387 LaneBitmask PrevMask = LiveMask; in recede()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterPressure.cpp | 739 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs() local
740 LaneBitmask BumpedMask = LiveMask | P.LaneMask; in bumpDeadDefs()
741 increaseRegPressure(Reg, LiveMask, BumpedMask); in bumpDeadDefs()
745 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs() local
746 LaneBitmask BumpedMask = LiveMask | P.LaneMask; in bumpDeadDefs()
747 decreaseRegPressure(Reg, BumpedMask, LiveMask); in bumpDeadDefs()
908 LaneBitmask LiveMask = LiveRegs.contains(Reg); in advance() local
909 LaneBitmask LiveIn = Use.LaneMask & ~LiveMask; in advance()
912 increaseRegPressure(Reg, LiveMask, LiveMask | LiveIn); in advance()
920 decreaseRegPressure(Reg, LiveMask, LiveMask & ~LastUseMask); in advance()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 1077 unsigned LiveMask = 0; in handleReturn() local
1098 LiveMask |= (1 << getFPReg(Op)); in handleReturn()
1108 adjustLiveRegs(LiveMask, MI); in handleReturn()
1109 if (!LiveMask) return; // Quick check to see if any are possible. in handleReturn()
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