| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 224 for (auto &I : LiveIns) in clearVirtRegs()
483 for (unsigned i = 0, e = LiveIns.size(); i != e; ++i) in EmitLiveInCopies()
484 if (LiveIns[i].second) { in EmitLiveInCopies()
485 if (use_nodbg_empty(LiveIns[i].second)) { in EmitLiveInCopies()
491 LiveIns.erase(LiveIns.begin() + i); in EmitLiveInCopies()
496 TII.get(TargetOpcode::COPY), LiveIns[i].second) in EmitLiveInCopies()
497 .addReg(LiveIns[i].first); in EmitLiveInCopies()
500 EntryMBB->addLiveIn(LiveIns[i].first); in EmitLiveInCopies()
504 EntryMBB->addLiveIn(LiveIns[i].first); in EmitLiveInCopies()
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| H A D | MachineBasicBlock.cpp | 600 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in removeLiveIn()
601 if (I == LiveIns.end()) in removeLiveIn()
606 LiveIns.erase(I); in removeLiveIn()
612 LiveInVector::iterator LI = LiveIns.begin() + (I - LiveIns.begin()); in removeLiveIn()
613 return LiveIns.erase(LI); in removeLiveIn()
618 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in isLiveIn()
623 llvm::sort(LiveIns, in sortUniqueLiveIns()
628 LiveInVector::const_iterator I = LiveIns.begin(); in sortUniqueLiveIns()
630 LiveInVector::iterator Out = LiveIns.begin(); in sortUniqueLiveIns()
631 for (; I != LiveIns.end(); ++Out, I = J) { in sortUniqueLiveIns()
[all …]
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| H A D | MachineTraceMetrics.cpp | 780 for (const LiveInReg &LIR : TBI.LiveIns) { in computeCrossBlockCriticalPath()
1001 TBI.LiveIns.push_back(Reg); in addLiveIns()
1019 TBI.LiveIns.clear(); in computeInstrHeights()
1037 for (LiveInReg &LI : TBI.LiveIns) { in computeInstrHeights()
1140 for (LiveInReg &LIR : TBI.LiveIns) { in computeInstrHeights()
1148 TBI.LiveIns.push_back(LiveInReg(RU.RegUnit, RU.Cycle)); in computeInstrHeights()
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| H A D | MachineOutliner.cpp | 774 LivePhysRegs LiveIns(TRI); in createOutlinedFunction() local
787 LiveIns.addReg(Reg); in createOutlinedFunction()
789 addLiveIns(MBB, LiveIns); in createOutlinedFunction()
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| H A D | RDFGraph.cpp | 643 LiveIns(PRI) {} in DataFlowGraph()
651 LiveIns(PRI) {} in DataFlowGraph()
917 LiveIns.insert(RegisterRef(P.first)); in build()
920 LiveIns.insert(RegisterRef(I.PhysReg, I.LaneMask)); in build()
924 for (RegisterRef RR : LiveIns.refs()) { in build()
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| H A D | PrologEpilogInserter.cpp | 1248 BitVector LiveIns(TRI.getNumRegs()); in insertZeroCallUsedRegs() local
1250 LiveIns.set(LI.PhysReg); in insertZeroCallUsedRegs()
1269 if (!LiveIns[Reg]) in insertZeroCallUsedRegs()
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| H A D | RDFLiveness.cpp | 904 const RegisterAggr &LiveIns = LiveMap[&B]; in resetLiveIns() local
905 for (RegisterRef R : LiveIns.refs()) in resetLiveIns()
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| H A D | MIRPrinter.cpp | 335 MF.LiveIns.push_back(LiveIn); in convert()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 150 std::vector<std::pair<MCRegister, Register>> LiveIns; variable
994 LiveIns.push_back(std::make_pair(Reg, vreg));
1001 livein_iterator livein_begin() const { return LiveIns.begin(); } in livein_begin()
1002 livein_iterator livein_end() const { return LiveIns.end(); } in livein_end()
1003 bool livein_empty() const { return LiveIns.empty(); } in livein_empty()
1006 return LiveIns; in liveins()
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| H A D | MachineBasicBlock.h | 175 LiveInVector LiveIns;
455 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
458 LiveIns.push_back(RegMaskPair);
494 livein_iterator livein_begin_dbg() const { return LiveIns.begin(); }
500 livein_iterator livein_end() const { return LiveIns.end(); }
501 bool livein_empty() const { return LiveIns.empty(); }
509 const std::vector<RegisterMaskPair> &getLiveIns() const { return LiveIns; }
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| H A D | MachineTraceMetrics.h | 243 SmallVector<LiveInReg, 4> LiveIns; member
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| H A D | RDFGraph.h | 700 const RegisterAggr &getLiveIns() const { return LiveIns; } in getLiveIns()
898 RegisterAggr LiveIns; member
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| H A D | MIRYamlMapping.h | 744 std::vector<MachineFunctionLiveIn> LiveIns;
786 YamlIO.mapOptional("liveins", MF.LiveIns,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBlockRanges.cpp | 235 RegisterSet LiveIns; in getLiveIns() local
253 LiveIns.insert(R); in getLiveIns()
256 LiveIns.insert(S); in getLiveIns()
258 return LiveIns; in getLiveIns()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNSchedStrategy.cpp | 612 RPTracker.advance(begin(), end(), &LiveIns[RegionIdx]); in getRealRegPressure()
666 LiveIns[CurRegion] = RPTracker.getLiveRegs(); in computeBlockPressure()
710 LiveIns.resize(Regions.size()); in finalizeSchedule()
932 << print(DAG.LiveIns[RegionIdx], DAG.MRI) in initGCNRegion()
934 << print(llvm::getRegPressure(DAG.MRI, DAG.LiveIns[RegionIdx])) in initGCNRegion()
1397 auto It = DAG.LiveIns[I].find(Reg); in collectRematerializableInstructions()
1398 if (It != DAG.LiveIns[I].end() && !It->second.none()) { in collectRematerializableInstructions()
1438 NewLiveIns[Idx] = DAG.LiveIns[Idx]; in sinkTriviallyRematInsts()
1582 DAG.LiveIns[Idx] = NewLiveIns[Idx]; in sinkTriviallyRematInsts()
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| H A D | GCNIterativeScheduler.cpp | 82 const auto LiveIns = getLiveRegsBefore(*Begin, *LIS); in printLivenessInfo() local
83 OS << "LIn RP: " << print(getRegPressure(MRI, LiveIns)); in printLivenessInfo()
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| H A D | GCNSchedStrategy.h | 206 SmallVector<GCNRPTracker::LiveRegSet, 32> LiveIns; variable
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | InstrRefBasedImpl.cpp | 3178 SmallVector<DbgValue, 32> LiveIns, LiveOuts; in buildVLocValueMap() local
3179 LiveIns.reserve(NumBlocks); in buildVLocValueMap()
3187 LiveIns.push_back(EmptyDbgValue); in buildVLocValueMap()
3198 LiveInIdx[BlockOrders[I]] = &LiveIns[I]; in buildVLocValueMap()
3210 LiveIns[I] = EmptyDbgValue; in buildVLocValueMap()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIRParser.cpp | 661 for (const auto &LiveIn : YamlMF.LiveIns) { in parseRegisterInfo()
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