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Searched refs:LegalVT (Results 1 – 5 of 5) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.cpp414 MVT LegalVT, VectorType *Tp, in costShuffleViaSplitting() argument
417 assert(LegalVT.isFixedLengthVector() && !Mask.empty() && in costShuffleViaSplitting()
419 unsigned LegalNumElts = LegalVT.getVectorNumElements(); in costShuffleViaSplitting()
426 LegalVT.getVectorElementType().getSizeInBits() != in costShuffleViaSplitting()
432 unsigned LegalVTSize = LegalVT.getStoreSize(); in costShuffleViaSplitting()
483 costShuffleViaVRegSplitting(const RISCVTTIImpl &TTI, MVT LegalVT, in costShuffleViaVRegSplitting() argument
486 assert(LegalVT.isFixedLengthVector()); in costShuffleViaVRegSplitting()
489 MVT ElemVT = LegalVT.getVectorElementType(); in costShuffleViaVRegSplitting()
491 LegalVT = TTI.getTypeLegalizationCost( in costShuffleViaVRegSplitting()
496 divideCeil(Mask.size(), LegalVT.getVectorNumElements()); in costShuffleViaVRegSplitting()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp216 EVT LegalVT = VT; in getSetCCResultType() local
217 while (getTypeAction(Context, LegalVT) != TypeLegal) in getSetCCResultType()
218 LegalVT = getTypeToTransformTo(Context, LegalVT); in getSetCCResultType()
221 if (LegalVT.getSimpleVT().is512BitVector()) in getSetCCResultType()
224 if (LegalVT.getSimpleVT().isVector() && Subtarget.hasVLX()) { in getSetCCResultType()
228 MVT EltVT = LegalVT.getSimpleVT().getVectorElementType(); in getSetCCResultType()
H A DX86TargetTransformInfo.cpp1731 MVT LegalVT = LT.second; in getShuffleCost() local
1732 if (LegalVT.isVector() && in getShuffleCost()
1733 LegalVT.getVectorElementType().getSizeInBits() == in getShuffleCost()
1735 LegalVT.getVectorNumElements() < in getShuffleCost()
1738 unsigned LegalVTSize = LegalVT.getStoreSize(); in getShuffleCost()
1745 LegalVT.getVectorNumElements()); in getShuffleCost()
1767 LegalVT.getVectorNumElements() * std::max(NumOfSrcs, E); in getShuffleCost()
1768 unsigned NumOfSrcRegs = NormalizedVF / LegalVT.getVectorNumElements(); in getShuffleCost()
1769 unsigned NumOfDestRegs = NormalizedVF / LegalVT.getVectorNumElements(); in getShuffleCost()
6629 MVT LegalVT = getTypeLegalizationCost(VecTy).second; in getInterleavedMemoryOpCostAVX512() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp4692 EVT LegalVT = getTypeToTransformTo(*DAG.getContext(), VT); in getFFBX_U32() local
4693 if (LegalVT != MVT::i32 && (Subtarget->has16BitInsts() && in getFFBX_U32()
4694 LegalVT != MVT::i16)) in getFFBX_U32()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp14698 EVT LegalVT = TLI.getTypeToTransformTo(*DAG.getContext(), AbsVT); in widenAbs() local
14701 DAG.getNode(ISD::SIGN_EXTEND, SDLoc(Abs), LegalVT, Abs.getOperand(0)); in widenAbs()
14702 SDValue NewAbs = DAG.getNode(ISD::ABS, SDLoc(Abs), LegalVT, SExt); in widenAbs()