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Searched refs:LaneSize (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp439 for (int i = 0, LaneSize = VF / LaneCount; i != LaneSize; ++i) in createShuffleStride() local
440 Mask.push_back((i * Stride) % LaneSize + LaneSize * Lane); in createShuffleStride()
H A DX86ISelLowering.cpp9914 int LaneSize = LaneSizeInBits / ScalarSizeInBits; in isLaneCrossingShuffleMask() local
9917 if (Mask[i] >= 0 && (Mask[i] % Size) / LaneSize != i / LaneSize) in isLaneCrossingShuffleMask()
9971 auto LaneSize = LaneSizeInBits / VT.getScalarSizeInBits(); in isRepeatedShuffleMask() local
9972 RepeatedMask.assign(LaneSize, -1); in isRepeatedShuffleMask()
9978 if ((Mask[i] % Size) / LaneSize != i / LaneSize) in isRepeatedShuffleMask()
9984 int LocalM = Mask[i] < Size ? Mask[i] % LaneSize in isRepeatedShuffleMask()
9985 : Mask[i] % LaneSize + LaneSize; in isRepeatedShuffleMask()
9986 if (RepeatedMask[i % LaneSize] < 0) in isRepeatedShuffleMask()
9988 RepeatedMask[i % LaneSize] = LocalM; in isRepeatedShuffleMask()
9989 else if (RepeatedMask[i % LaneSize] != LocalM) in isRepeatedShuffleMask()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerLowering.cpp169 for (unsigned LaneSize : {64U, 32U, 16U}) { in matchREV()
170 if (isREVMask(ShuffleMask, EltSize, NumElts, LaneSize)) { in matchREV()
172 if (LaneSize == 64U) in matchREV()
174 else if (LaneSize == 32U) in matchREV()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp1128 auto LaneSize = LaneSizeInBits / VT.getScalarSizeInBits(); in isRepeatedShuffleMask() local
1129 RepeatedMask.assign(LaneSize, -1); in isRepeatedShuffleMask()
1135 if ((Mask[i] % Size) / LaneSize != i / LaneSize) in isRepeatedShuffleMask()
1142 Mask[i] < Size ? Mask[i] % LaneSize : Mask[i] % LaneSize + LaneSize; in isRepeatedShuffleMask()
1143 if (RepeatedMask[i % LaneSize] < 0) in isRepeatedShuffleMask()
1145 RepeatedMask[i % LaneSize] = LocalM; in isRepeatedShuffleMask()
1146 else if (RepeatedMask[i % LaneSize] != LocalM) in isRepeatedShuffleMask()
2178 int LaneSize = Size / 2; in lowerVECTOR_SHUFFLEAsLanePermuteAndShuffle() local
2182 if (Mask[i] >= 0 && ((Mask[i] % Size) / LaneSize) != (i / LaneSize)) in lowerVECTOR_SHUFFLEAsLanePermuteAndShuffle()
2183 LaneCrossing[(Mask[i] % Size) / LaneSize] = true; in lowerVECTOR_SHUFFLEAsLanePermuteAndShuffle()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2613 size_t LaneSize = in LowerBUILD_VECTOR() local
2615 assert(LaneSize > DestLaneSize); in LowerBUILD_VECTOR()
2616 Scale1 = LaneSize / DestLaneSize; in LowerBUILD_VECTOR()
2620 size_t LaneSize = in LowerBUILD_VECTOR() local
2622 assert(LaneSize > DestLaneSize); in LowerBUILD_VECTOR()
2623 Scale2 = LaneSize / DestLaneSize; in LowerBUILD_VECTOR()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/
H A DARM.cpp3461 unsigned LaneSize = V->getType()->getScalarSizeInBits(); in ARMMVEVectorElementReverse() local
3462 unsigned Elements = 128 / LaneSize; in ARMMVEVectorElementReverse()
3463 unsigned Mask = ReverseWidth / LaneSize - 1; in ARMMVEVectorElementReverse()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp14017 for (unsigned LaneSize : {64U, 32U, 16U}) { in LowerVECTOR_SHUFFLE()
14019 if (isWideDUPMask(ShuffleMask, VT, LaneSize, Lane)) { in LowerVECTOR_SHUFFLE()
14020 unsigned Opcode = LaneSize == 64 ? AArch64ISD::DUPLANE64 in LowerVECTOR_SHUFFLE()
14021 : LaneSize == 32 ? AArch64ISD::DUPLANE32 in LowerVECTOR_SHUFFLE()
14024 MVT NewEltTy = MVT::getIntegerVT(LaneSize); in LowerVECTOR_SHUFFLE()
14025 unsigned NewEltCount = VT.getSizeInBits() / LaneSize; in LowerVECTOR_SHUFFLE()