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Searched refs:LaneMask (Results 1 – 25 of 57) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterPressure.h41 LaneBitmask LaneMask; member
43 VRegMaskOrUnit(Register RegUnit, LaneBitmask LaneMask) in VRegMaskOrUnit()
44 : RegUnit(RegUnit), LaneMask(LaneMask) {} in VRegMaskOrUnit()
268 LaneBitmask LaneMask; member
270 IndexMaskPair(unsigned Index, LaneBitmask LaneMask) in IndexMaskPair()
271 : Index(Index), LaneMask(LaneMask) {} in IndexMaskPair()
304 return I->LaneMask; in contains()
311 auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask)); in insert()
313 LaneBitmask PrevMask = InsertRes.first->LaneMask; in insert()
314 InsertRes.first->LaneMask |= Pair.LaneMask; in insert()
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H A DScheduleDAGInstrs.h56 LaneBitmask LaneMask; member
59 VReg2SUnit(Register VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
60 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
71 VReg2SUnitOperIdx(Register VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
73 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
H A DLiveInterval.h700 LaneBitmask LaneMask; variable
703 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange() argument
706 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange() argument
708 : LiveRange(Other, Allocator), LaneMask(LaneMask) {} in SubRange()
796 LaneBitmask LaneMask) { in createSubRange() argument
797 SubRange *Range = new (Allocator) SubRange(LaneMask); in createSubRange()
805 LaneBitmask LaneMask, in createSubRangeFrom() argument
807 SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator); in createSubRangeFrom()
837 LaneBitmask LaneMask,
881 refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
H A DMachineBasicBlock.h130 LaneBitmask LaneMask;
132 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
133 : PhysReg(PhysReg), LaneMask(LaneMask) {}
136 return PhysReg == other.PhysReg && LaneMask == other.LaneMask;
479 LaneBitmask LaneMask = LaneBitmask::getAll()) {
480 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
506 LaneBitmask LaneMask = LaneBitmask::getAll());
510 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
H A DTargetRegisterInfo.h54 const LaneBitmask LaneMask; variable
211 return LaneMask; in getLaneMask()
432 LaneBitmask LaneMask,
768 LaneBitmask LaneMask) const { in reverseComposeSubRegIndexLaneMask() argument
770 return LaneMask; in reverseComposeSubRegIndexLaneMask()
771 return reverseComposeSubRegIndexLaneMaskImpl(IdxA, LaneMask); in reverseComposeSubRegIndexLaneMask()
H A DLiveIntervalCalc.h40 LLVM_ABI void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask,
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterPressure.cpp97 if (!P.LaneMask.all()) in dump()
98 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
105 if (!P.LaneMask.all()) in dump()
106 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
362 LaneBitmask::getNone(), Pair.LaneMask); in initLiveThru()
373 return I->LaneMask; in getRegLanes()
379 assert(Pair.LaneMask.any()); in addRegLanes()
386 I->LaneMask |= Pair.LaneMask; in addRegLanes()
398 I->LaneMask = LaneBitmask::getNone(); in setRegZero()
405 assert(Pair.LaneMask.any()); in removeRegLanes()
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H A DScheduleDAGInstrs.cpp249 if ((Mask & LI.LaneMask).any() && !Uses.contains(Unit)) in addSchedBarrierDeps()
416 return (RegUse->LaneMask & getLaneMaskForMO(MO)).none(); in deadDefHasNoUse()
465 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps() local
467 if ((LaneMask & KillLaneMask).none()) { in addVRegDefDeps()
472 if ((LaneMask & DefLaneMask).any()) { in addVRegDefDeps()
483 LaneMask &= ~KillLaneMask; in addVRegDefDeps()
485 if (LaneMask.any()) { in addVRegDefDeps()
486 I->LaneMask = LaneMask; in addVRegDefDeps()
504 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps() local
508 if ((V2SU.LaneMask & LaneMask).none()) in addVRegDefDeps()
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H A DMachineVerifier.cpp317 LaneBitmask LaneMask) const;
323 void report_context_lanemask(LaneBitmask LaneMask) const;
333 LaneBitmask LaneMask = LaneBitmask::getNone());
337 LaneBitmask LaneMask = LaneBitmask::getNone());
353 LaneBitmask LaneMask = LaneBitmask::getNone());
640 LaneBitmask LaneMask) const { in report_context()
643 if (LaneMask.any()) in report_context()
644 report_context_lanemask(LaneMask); in report_context()
677 void MachineVerifier::report_context_lanemask(LaneBitmask LaneMask) const { in report_context_lanemask()
678 OS << "- lanemask: " << PrintLaneMask(LaneMask) << '\n'; in report_context_lanemask()
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H A DLiveIntervals.cpp406 Register Reg, LaneBitmask LaneMask) { in extendSegmentsToUses() argument
417 if ((SR.LaneMask & M).any()) { in extendSegmentsToUses()
418 assert(SR.LaneMask == M && "Expecting lane masks to match exactly"); in extendSegmentsToUses()
426 const LiveRange &OldRange = getSubRange(LI, LaneMask); in extendSegmentsToUses()
473 assert(LaneMask.any() && in extendSegmentsToUses()
476 LI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes); in extendSegmentsToUses()
602 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses() local
603 if ((LaneMask & SR.LaneMask).none()) in shrinkToUses()
631 extendSegmentsToUses(NewLR, WorkList, Reg, SR.LaneMask); in shrinkToUses()
814 DefinedLanesMask |= SR.LaneMask; in addKillFlags()
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H A DRenameIndependentSubregs.cpp189 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents() local
193 if ((SR.LaneMask & LaneMask).none()) in findComponents()
233 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands() local
238 if ((SR.LaneMask & LaneMask).none()) in rewriteOperands()
291 SubRanges[ID-1] = Intervals[ID]->createSubRange(Allocator, SR.LaneMask); in distribute()
345 Mask = Mask & ~SR.LaneMask; in computeMainRangesFixFlags()
H A DRegisterCoalescer.cpp264 LaneBitmask LaneMask, CoalescerPair &CP,
270 LaneBitmask LaneMask, const CoalescerPair &CP);
1014 MaskA |= SA.LaneMask; in removeCopyByCommutingDef()
1017 Allocator, SA.LaneMask, in removeCopyByCommutingDef()
1034 if ((SB.LaneMask & MaskA).any()) in removeCopyByCommutingDef()
1272 IntB.computeSubRangeUndefs(Undefs, SR.LaneMask, *MRI, in removePartialRedundancy()
1528 SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask); in reMaterializeTrivialDef()
1584 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef()
1609 if ((SR.LaneMask & DstMask).none()) { in reMaterializeTrivialDef()
1612 << PrintLaneMask(SR.LaneMask) << " : " << SR << "\n"); in reMaterializeTrivialDef()
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H A DLiveInterval.cpp873 LaneBitmask LaneMask, in stripValuesNotDefiningMask() argument
903 if ((ExpectedDefMask & LaneMask).none()) in stripValuesNotDefiningMask()
920 BumpPtrAllocator &Allocator, LaneBitmask LaneMask, in refineSubRanges() argument
924 LaneBitmask ToApply = LaneMask; in refineSubRanges()
926 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges()
927 LaneBitmask Matching = SRMask & LaneMask; in refineSubRanges()
938 SR.LaneMask = SRMask & ~Matching; in refineSubRanges()
945 stripValuesNotDefiningMask(reg(), SR, SR.LaneMask, Indexes, TRI, in refineSubRanges()
966 LaneBitmask LaneMask, in computeSubRangeUndefs() argument
971 assert((VRegMask & LaneMask).any()); in computeSubRangeUndefs()
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H A DSplitKit.cpp402 if (S.LaneMask == LM) in getSubrangeImpl()
424 if ((S.LaneMask & LM) == LM) in getSubRangeForMask()
441 auto &PS = getSubRangeForMask(S.LaneMask, Edit->getParent()); in addDeadDef()
465 if ((S.LaneMask & LM).any()) in addDeadDef()
546 LaneBitmask LaneMask, MachineBasicBlock &MBB, in buildCopy() argument
551 if (LaneMask.all() || LaneMask == MRI.getMaxLaneMaskForVReg(FromReg)) { in buildCopy()
571 if (!TRI.getCoveringSubRegIndexes(RC, LaneMask, SubIndexes)) in buildCopy()
582 Allocator, LaneMask, in buildCopy()
655 LaneBitmask LaneMask; in defFromParent() local
657 LaneMask = LaneBitmask::getNone(); in defFromParent()
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H A DLiveRangeEdit.cpp50 LI.createSubRange(Alloc, S.LaneMask); in createEmptyIntervalFrom()
144 if ((SR.LaneMask & LM).none()) in allUsesAvailableAt()
149 LM &= ~SR.LaneMask; in allUsesAvailableAt()
270 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in useIsKill() local
272 if ((S.LaneMask & LaneMask).any() && S.Query(Idx).isKill()) in useIsKill()
H A DMachineBasicBlock.cpp429 if (!LI.LaneMask.all()) in print()
430 OS << ":0x" << PrintLaneMask(LI.LaneMask); in print()
598 void MachineBasicBlock::removeLiveIn(MCRegister Reg, LaneBitmask LaneMask) { in removeLiveIn() argument
604 I->LaneMask &= ~LaneMask; in removeLiveIn()
605 if (I->LaneMask.none()) in removeLiveIn()
616 bool MachineBasicBlock::isLiveIn(MCRegister Reg, LaneBitmask LaneMask) const { in isLiveIn()
619 return I != livein_end() && (I->LaneMask & LaneMask).any(); in isLiveIn()
633 LaneBitmask LaneMask = I->LaneMask; in sortUniqueLiveIns() local
635 LaneMask |= J->LaneMask; in sortUniqueLiveIns()
637 Out->LaneMask = LaneMask; in sortUniqueLiveIns()
H A DInterleavedAccessPass.cpp371 Value *LaneMask = in lowerInterleavedLoad() local
373 if (!LaneMask) in lowerInterleavedLoad()
384 if (!TLI->lowerInterleavedVPLoad(VPLoad, LaneMask, ShuffleValues)) in lowerInterleavedLoad()
534 Value *LaneMask = getMask(VPStore->getMaskParam(), Factor, in lowerInterleavedStore() local
536 if (!LaneMask) in lowerInterleavedStore()
560 if (!TLI->lowerInterleavedVPStore(VPStore, LaneMask, NewShuffles)) in lowerInterleavedStore()
H A DVirtRegMap.cpp390 LaneBitmask LaneMask; in addLiveInsForSubRanges() local
399 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges()
401 if (LaneMask.none()) in addLiveInsForSubRanges()
404 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges()
471 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex)) in readsUndefSubreg()
616 LaneBitmask NeedImpDefLanes = UndefMask & SR.LaneMask; in liveOutUndefPhiLanesForUndefSubregDef()
H A DTargetRegisterInfo.cpp564 const TargetRegisterClass *RC, LaneBitmask LaneMask, in getCoveringSubRegIndexes() argument
576 if (SubRegMask == LaneMask) { in getCoveringSubRegIndexes()
582 if ((SubRegMask & ~LaneMask).any()) in getCoveringSubRegIndexes()
601 LaneBitmask LanesLeft = LaneMask & ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes()
H A DRDFRegisters.cpp38 if (RC->LaneMask != RI.RegClass->LaneMask) { in PhysicalRegisterInfo()
173 RI.RegClass ? RI.RegClass->LaneMask : LaneBitmask::getAll(); in mapTo()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DLaneBitmask.h92 inline Printable PrintLaneMask(LaneBitmask LaneMask) { in PrintLaneMask() argument
93 return Printable([LaneMask](raw_ostream &OS) { in PrintLaneMask()
94 OS << format(LaneBitmask::FormatStr, LaneMask.getAsInteger()); in PrintLaneMask()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.cpp287 P.LaneMask |= MO.getSubReg() ? TRI.getSubRegIndexLaneMask(MO.getSubReg()) in collectVirtualRegUses()
303 P.LaneMask = getLiveLaneMask(LI, InstrSI, MRI, P.LaneMask); in collectVirtualRegUses()
319 Result |= SR.LaneMask; in getLanesWithProperty()
443 if ((S.LaneMask & LaneMaskFilter).any() && S.liveAt(SI)) { in getLiveLaneMask()
444 LiveMask |= S.LaneMask; in getLiveLaneMask()
556 LiveMask |= U.LaneMask; in recede()
627 It->second &= ~S.LaneMask; in advanceBeforeNext()
779 LaneBitmask NewMask = LiveMask | Def.LaneMask; in bumpDownwardPressure()
851 if ((SR.LaneMask & Mask) == SR.LaneMask && IsInOneSegment(SR)) in getRegLiveThroughMask()
852 LiveThroughMask |= SR.LaneMask; in getRegLiveThroughMask()
H A DSILowerI1Copies.h72 void initializeLaneMaskRegisterAttributes(Register LaneMask) { in initializeLaneMaskRegisterAttributes() argument
73 LaneMaskRegAttrs = MRI->getVRegAttrs(LaneMask); in initializeLaneMaskRegisterAttributes()
H A DAMDGPUGlobalISelDivergenceLowering.cpp133 Register LaneMask = createLaneMaskReg(MRI, LaneMaskRegAttrs); in buildRegCopyToLaneMask() local
137 B.buildCopy(LaneMask, Reg); in buildRegCopyToLaneMask()
138 return LaneMask; in buildRegCopyToLaneMask()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.cpp112 if (LaneMask.any()) in computeLaneMask()
113 return LaneMask; in computeLaneMask()
116 LaneMask = LaneBitmask::getAll(); in computeLaneMask()
123 LaneMask = M; in computeLaneMask()
124 return LaneMask; in computeLaneMask()
1510 Idx.LaneMask = LaneBitmask::getLane(Bit); in computeSubRegLaneMasks()
1513 Idx.LaneMask = LaneBitmask::getNone(); in computeSubRegLaneMasks()
1532 unsigned DstBit = Idx.LaneMask.getHighestLane(); in computeSubRegLaneMasks()
1533 assert(Idx.LaneMask == LaneBitmask::getLane(DstBit) && in computeSubRegLaneMasks()
1552 assert(Idx2.LaneMask == SrcMask); in computeSubRegLaneMasks()
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