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Searched refs:LaneBitmask (Results 1 – 25 of 64) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DLaneBitmask.h40 struct LaneBitmask { struct
46 constexpr LaneBitmask() = default; argument
47 explicit constexpr LaneBitmask(Type V) : Mask(V) {} in LaneBitmask() argument
49 constexpr bool operator== (LaneBitmask M) const { return Mask == M.Mask; }
50 constexpr bool operator!= (LaneBitmask M) const { return Mask != M.Mask; }
51 constexpr bool operator< (LaneBitmask M) const { return Mask < M.Mask; }
56 constexpr LaneBitmask operator~() const { argument
57 return LaneBitmask(~Mask);
59 constexpr LaneBitmask operator|(LaneBitmask M) const {
60 return LaneBitmask(Mask | M.Mask);
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DDetectDeadLanes.h49 LaneBitmask UsedLanes;
50 LaneBitmask DefinedLanes;
71 void addUsedLanesOnOperand(const MachineOperand &MO, LaneBitmask UsedLanes);
76 void transferUsedLanesStep(const MachineInstr &MI, LaneBitmask UsedLanes);
82 LaneBitmask DefinedLanes);
88 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
89 LaneBitmask DefinedLanes) const;
93 LaneBitmask transferUsedLanes(const MachineInstr &MI, LaneBitmask UsedLanes,
97 LaneBitmask determineInitialDefinedLanes(Register Reg);
98 LaneBitmask determineInitialUsedLanes(Register Reg);
H A DRegisterPressure.h41 LaneBitmask LaneMask;
43 VRegMaskOrUnit(Register RegUnit, LaneBitmask LaneMask) in VRegMaskOrUnit()
268 LaneBitmask LaneMask;
270 IndexMaskPair(unsigned Index, LaneBitmask LaneMask) in IndexMaskPair()
299 LaneBitmask contains(Register Reg) const { in contains()
303 return LaneBitmask::getNone(); in contains()
309 LaneBitmask insert(VRegMaskOrUnit Pair) { in insert()
313 LaneBitmask PrevMask = InsertRes.first->LaneMask; in insert()
317 return LaneBitmask::getNone(); in insert()
322 LaneBitmask erase(VRegMaskOrUnit Pair) { in erase()
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H A DTargetRegisterInfo.h54 const LaneBitmask LaneMask;
210 LaneBitmask getLaneMask() const { in getLaneMask()
260 const LaneBitmask *SubRegIndexLaneMasks;
263 LaneBitmask CoveringLanes;
272 const LaneBitmask *SRILaneMasks, LaneBitmask CoveringLanes,
422 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask()
432 LaneBitmask LaneMask,
458 LaneBitmask getCoveringLanes() const { return CoveringLanes; } in getCoveringLanes()
753 LaneBitmask composeSubRegIndexLaneMask(unsigned IdxA, in composeSubRegIndexLaneMask()
754 LaneBitmask Mask) const { in composeSubRegIndexLaneMask()
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H A DRDFRegisters.h90 LaneBitmask Mask = LaneBitmask::getNone(); // Only for registers.
94 LaneBitmask M = LaneBitmask::getAll())
95 : Reg(R), Mask(isRegId(R) && R != 0 ? M : LaneBitmask::getNone()) {} in Reg()
110 std::hash<LaneBitmask::Type>{}(Mask.getAsInteger()); in hash()
185 LaneBitmask Mask;
237 using MapType = std::map<RegisterId, LaneBitmask>;
315 PrintLaneMaskShort(LaneBitmask M) : Mask(M) {} in PrintLaneMaskShort()
316 LaneBitmask Mask;
H A DLiveIntervalCalc.h40 LLVM_ABI void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask,
56 extendToUses(LR, PhysReg, LaneBitmask::getAll()); in extendToUses()
H A DScheduleDAGInstrs.h56 LaneBitmask LaneMask;
59 VReg2SUnit(Register VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
71 VReg2SUnitOperIdx(Register VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
406 LaneBitmask getLaneMaskForMO(const MachineOperand &MO) const;
H A DLiveInterval.h700 LaneBitmask LaneMask;
703 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange()
706 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange()
796 LaneBitmask LaneMask) { in createSubRange()
805 LaneBitmask LaneMask, in createSubRangeFrom()
837 LaneBitmask LaneMask,
881 refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
H A DLiveRegUnits.h94 void addRegMasked(MCRegister Reg, LaneBitmask Mask) { in addRegMasked()
96 LaneBitmask UnitMask = (*Unit).second; in addRegMasked()
H A DRegisterScavenging.h25 #include "llvm/MC/LaneBitmask.h"
147 void setRegUsed(Register Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterPressure.cpp51 LaneBitmask PrevMask, LaneBitmask NewMask) { in increaseSetPressure()
65 LaneBitmask PrevMask, LaneBitmask NewMask) { in decreaseSetPressure()
152 LaneBitmask PreviousMask, in increaseRegPressure()
153 LaneBitmask NewMask) { in increaseRegPressure()
167 LaneBitmask PreviousMask, in decreaseRegPressure()
168 LaneBitmask NewMask) { in decreaseRegPressure()
362 LaneBitmask::getNone(), Pair.LaneMask); in initLiveThru()
366 static LaneBitmask getRegLanes(ArrayRef<VRegMaskOrUnit> RegUnits, in getRegLanes()
372 return LaneBitmask::getNone(); in getRegLanes()
396 RegUnits.emplace_back(RegUnit, LaneBitmask::getNone()); in setRegZero()
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H A DDetectDeadLanes.cpp109 LaneBitmask UsedLanes) { in addUsedLanesOnOperand()
123 LaneBitmask PrevUsedLanes = MORegInfo.UsedLanes; in addUsedLanesOnOperand()
135 LaneBitmask UsedLanes) { in transferUsedLanesStep()
139 LaneBitmask UsedOnMO = transferUsedLanes(MI, UsedLanes, MO); in transferUsedLanesStep()
144 LaneBitmask
146 LaneBitmask UsedLanes, in transferUsedLanes()
163 LaneBitmask MO2UsedLanes = in transferUsedLanes()
171 LaneBitmask MO1UsedLanes; in transferUsedLanes()
191 LaneBitmask DefinedLanes) { in transferDefinedLanesStep()
217 LaneBitmask PrevDefinedLanes = RegInfo.DefinedLanes; in transferDefinedLanesStep()
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H A DLiveIntervalCalc.cpp59 LaneBitmask SubMask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg) in calculate()
64 LaneBitmask ClassMask = MRI->getMaxLaneMaskForVReg(Reg); in calculate()
101 extendToUses(LI, Reg, LaneBitmask::getAll()); in calculate()
119 extendToUses(MainRange, LI.reg(), LaneBitmask::getAll(), &LI); in constructMainRangeFromSubranges()
135 LaneBitmask Mask, LiveInterval *LI) { in extendToUses()
159 LaneBitmask SLM = TRI.getSubRegIndexLaneMask(SubReg); in extendToUses()
H A DRDFRegisters.cpp57 UnitInfos[U].Mask = LaneBitmask::getAll(); in PhysicalRegisterInfo()
61 std::pair<uint32_t, LaneBitmask> P = *I; in PhysicalRegisterInfo()
172 LaneBitmask RCM = in mapTo()
173 RI.RegClass ? RI.RegClass->LaneMask : LaneBitmask::getAll(); in mapTo()
174 LaneBitmask M = TRI.reverseComposeSubRegIndexLaneMask(Idx, RR.Mask); in mapTo()
284 std::pair<uint32_t, LaneBitmask> P = *U; in hasAliasOf()
299 std::pair<uint32_t, LaneBitmask> P = *U; in hasCoverOf()
314 std::pair<uint32_t, LaneBitmask> P = *U; in insert()
385 LaneBitmask M; in makeRegRef()
387 std::pair<uint32_t, LaneBitmask> P = *I; in makeRegRef()
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H A DRegisterCoalescer.cpp159 LaneBitmask ShrinkMask;
232 LaneBitmask PrunedLanes);
264 LaneBitmask LaneMask, CoalescerPair &CP,
270 LaneBitmask LaneMask, const CoalescerPair &CP);
995 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntA.reg()); in removeCopyByCommutingDef()
998 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntB.reg()); in removeCopyByCommutingDef()
1002 LaneBitmask MaskA; in removeCopyByCommutingDef()
1553 LaneBitmask FullMask = MRI->getMaxLaneMaskForVReg(DstReg); in reMaterializeTrivialDef()
1554 LaneBitmask UsedLanes = TRI->getSubRegIndexLaneMask(NewIdx); in reMaterializeTrivialDef()
1555 LaneBitmask UnusedLanes = FullMask & ~UsedLanes; in reMaterializeTrivialDef()
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H A DVirtRegMap.cpp220 LaneBitmask liveOutUndefPhiLanesForUndefSubregDef(
390 LaneBitmask LaneMask; in addLiveInsForSubRanges()
468 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(SubRegIdx); in readsUndefSubreg()
608 LaneBitmask VirtRegRewriter::liveOutUndefPhiLanesForUndefSubregDef( in liveOutUndefPhiLanesForUndefSubregDef()
611 LaneBitmask UndefMask = ~TRI->getSubRegIndexLaneMask(SubReg); in liveOutUndefPhiLanesForUndefSubregDef()
612 LaneBitmask LiveOutUndefLanes; in liveOutUndefPhiLanesForUndefSubregDef()
616 LaneBitmask NeedImpDefLanes = UndefMask & SR.LaneMask; in liveOutUndefPhiLanesForUndefSubregDef()
627 LaneBitmask InterferingLanes = in liveOutUndefPhiLanesForUndefSubregDef()
696 LaneBitmask LiveOutUndefLanes = in rewrite()
H A DLiveInterval.cpp873 LaneBitmask LaneMask, in stripValuesNotDefiningMask()
898 LaneBitmask OrigMask = TRI.getSubRegIndexLaneMask(MOI->getSubReg()); in stripValuesNotDefiningMask()
899 LaneBitmask ExpectedDefMask = in stripValuesNotDefiningMask()
920 BumpPtrAllocator &Allocator, LaneBitmask LaneMask, in refineSubRanges()
924 LaneBitmask ToApply = LaneMask; in refineSubRanges()
926 LaneBitmask SRMask = SR.LaneMask; in refineSubRanges()
927 LaneBitmask Matching = SRMask & LaneMask; in refineSubRanges()
966 LaneBitmask LaneMask, in computeSubRangeUndefs()
970 LaneBitmask VRegMask = MRI.getMaxLaneMaskForVReg(reg()); in computeSubRangeUndefs()
978 LaneBitmask DefMask = TRI.getSubRegIndexLaneMask(SubReg); in computeSubRangeUndefs()
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H A DScheduleDAGInstrs.cpp398 LaneBitmask ScheduleDAGInstrs::getLaneMaskForMO(const MachineOperand &MO) const in getLaneMaskForMO()
404 return LaneBitmask::getAll(); in getLaneMaskForMO()
430 LaneBitmask DefLaneMask; in addVRegDefDeps()
431 LaneBitmask KillLaneMask; in addVRegDefDeps()
437 KillLaneMask = IsKill ? LaneBitmask::getAll() : DefLaneMask; in addVRegDefDeps()
454 DefLaneMask = LaneBitmask::getAll(); in addVRegDefDeps()
455 KillLaneMask = LaneBitmask::getAll(); in addVRegDefDeps()
465 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps()
504 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps()
527 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps()
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H A DMachineInstrBundle.cpp287 std::pair<LaneBitmask, LaneBitmask>
292 LaneBitmask UseMask, DefMask; in AnalyzeVirtRegLanesInBundle()
302 LaneBitmask SubRegMask = TRI.getSubRegIndexLaneMask(SubReg); in AnalyzeVirtRegLanesInBundle()
H A DLiveIntervals.cpp406 Register Reg, LaneBitmask LaneMask) { in extendSegmentsToUses()
412 auto getSubRange = [](const LiveInterval &I, LaneBitmask M) in extendSegmentsToUses()
532 extendSegmentsToUses(NewLR, WorkList, Reg, LaneBitmask::getNone()); in shrinkToUses()
602 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses()
747 LaneBitmask ArtificialLanes; in addKillFlags()
801 LaneBitmask DefinedLanesMask; in addKillFlags()
819 DefinedLanesMask = LaneBitmask::getAll(); in addKillFlags()
828 LaneBitmask UseMask = SubReg ? TRI->getSubRegIndexLaneMask(SubReg) in addKillFlags()
1078 LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg) in updateAllRanges()
1086 updateRange(LI, VirtRegOrUnit(Reg), LaneBitmask::getNone()); in updateAllRanges()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.cpp45 LaneBitmask PrevMask, in inc()
46 LaneBitmask NewMask, in inc()
254 static LaneBitmask getDefRegMask(const MachineOperand &MO, in getDefRegMask()
284 ? VRegMaskOrUnits.emplace_back(Reg, LaneBitmask::getNone()) in collectVirtualRegUses()
308 static LaneBitmask getLanesWithProperty( in getLanesWithProperty()
311 LaneBitmask SafeDefault, in getLanesWithProperty()
315 LaneBitmask Result; in getLanesWithProperty()
323 : LaneBitmask::getAll(); in getLanesWithProperty()
332 return Property(*LR, Pos) ? LaneBitmask::getAll() : LaneBitmask::getNone(); in getLanesWithProperty()
339 static LaneBitmask findUseBetween(unsigned Reg, LaneBitmask LastUseMask, in findUseBetween()
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H A DGCNRegPressure.h80 LaneBitmask PrevMask,
81 LaneBitmask NewMask,
199 void saveReg(Register Reg, LaneBitmask Mask, const MachineRegisterInfo &MRI) { in saveReg()
200 RP.inc(Reg, Mask, LaneBitmask::getNone(), MRI); in saveReg()
265 using LiveRegSet = DenseMap<unsigned, LaneBitmask>;
282 LaneBitmask getLastUsedLanes(Register RegUnit, SlotIndex Pos) const;
425 LaneBitmask getLiveLaneMask(unsigned Reg, SlotIndex SI,
428 LaneBitmask LaneMaskFilter = LaneBitmask::getAll());
430 LaneBitmask getLiveLaneMask(const LiveInterval &LI, SlotIndex SI,
432 LaneBitmask LaneMaskFilter = LaneBitmask::getAll());
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H A DSIFormMemoryClauses.cpp36 using RegUse = DenseMap<unsigned, std::pair<unsigned, LaneBitmask>>;
181 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(MO.getSubReg()); in canBundle()
232 LaneBitmask Mask = Reg.isVirtual() in collectRegUses()
234 : LaneBitmask::getAll(); in collectRegUses()
361 LaneBitmask KilledMask; in run()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.h52 LaneBitmask Mask;
72 mutable LaneBitmask LaneMask;
155 LaneBitmask computeLaneMask() const;
252 typedef SmallVector<LaneBitmask, 16> RegUnitLaneMaskList;
261 ArrayRef<LaneBitmask> getRegUnitLaneMasks() const { in getRegUnitLaneMasks()
367 LaneBitmask LaneMask;
898 LaneBitmask CoveringLanes;
H A DCodeGenRegisters.cpp110 LaneBitmask CodeGenSubRegIndex::computeLaneMask() const { in computeLaneMask()
116 LaneMask = LaneBitmask::getAll(); in computeLaneMask()
119 LaneBitmask M; in computeLaneMask()
1502 CoveringLanes = LaneBitmask::getAll(); in computeSubRegLaneMasks()
1505 if (Bit > LaneBitmask::BitWidth) { in computeSubRegLaneMasks()
1510 Idx.LaneMask = LaneBitmask::getLane(Bit); in computeSubRegLaneMasks()
1513 Idx.LaneMask = LaneBitmask::getNone(); in computeSubRegLaneMasks()
1533 assert(Idx.LaneMask == LaneBitmask::getLane(DstBit) && in computeSubRegLaneMasks()
1535 MaskRolPair MaskRol = {LaneBitmask::getLane(0), (uint8_t)DstBit}; in computeSubRegLaneMasks()
1549 LaneBitmask SrcMask = LaneBitmask::getLane(SrcBit); in computeSubRegLaneMasks()
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