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Searched refs:LRM (Results 1 – 11 of 11) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURewriteAGPRCopyMFMA.cpp50 LiveRegMatrix ‎ member in __anone22991190111::AMDGPURewriteAGPRCopyMFMAImpl
55 LiveRegMatrix &LRM, LiveIntervals &LIS) in AMDGPURewriteAGPRCopyMFMAImpl() argument
57 TRI(*ST.getRegisterInfo()), MRI(MF.getRegInfo()), VRM(VRM), LRM(LRM), in AMDGPURewriteAGPRCopyMFMAImpl()
99 if (!LRM.isPhysRegUsed(AMDGPU::AGPR0)) in run()
219 LRM.unassign(CopySrcLI); in run()
284 auto &LRM = getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM(); in runOnMachineFunction() local
287 AMDGPURewriteAGPRCopyMFMAImpl Impl(MF, VRM, LRM, LIS); in runOnMachineFunction()
295 LiveRegMatrix &LRM = MFAM.getResult<LiveRegMatrixAnalysis>(MF); in run() local
298 AMDGPURewriteAGPRCopyMFMAImpl Impl(MF, VRM, LRM, LIS); in run()
H A DGCNNSAReassign.cpp41 : VRM(VM), LRM(LM), LIS(LS) {} in GCNNSAReassignImpl()
62 LiveRegMatrix *LRM; member in __anond94b4ce90111::GCNNSAReassignImpl
121 LRM->unassign(*Intervals[N]); in tryAssignRegisters()
124 if (LRM->checkInterference(*Intervals[N], MCRegister::from(StartReg + N))) in tryAssignRegisters()
128 LRM->assign(*Intervals[N], MCRegister::from(StartReg + N)); in tryAssignRegisters()
141 !LRM->isPhysRegUsed(CSRegs[I])) in canAssign()
354 LRM->unassign(*Intervals[I]); in run()
357 LRM->assign(*Intervals[I], OrigRegs[I]); in run()
378 auto *LRM = &getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM(); in runOnMachineFunction() local
381 GCNNSAReassignImpl Impl(VRM, LRM, LIS); in runOnMachineFunction()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveRegMatrix.h174 LiveRegMatrix LRM; variable
181 LiveRegMatrix &getLRM() { return LRM; } in getLRM()
182 const LiveRegMatrix &getLRM() const { return LRM; } in getLRM()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveRegMatrix.cpp56 LRM.init(MF, LIS, VRM); in runOnMachineFunction()
75 void LiveRegMatrixWrapperLegacy::releaseMemory() { LRM.releaseMemory(); } in releaseMemory()
299 LiveRegMatrix LRM; in run() local
300 LRM.init(MF, LIS, VRM); in run()
301 return LRM; in run()
H A DVirtRegMap.cpp207 LiveRegMatrix *LRM = nullptr; member in __anonbe45f4950111::VirtRegRewriter
226 LiveRegMatrix *LRM, VirtRegMap *VRM, in VirtRegRewriter() argument
228 : Indexes(Indexes), LIS(LIS), LRM(LRM), VRM(VRM), DebugVars(DebugVars), in VirtRegRewriter()
292 LiveRegMatrix &LRM = getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM(); in runOnMachineFunction() local
297 VirtRegRewriter R(ClearVirtRegs, &Indexes, &LIS, &LRM, &VRM, &DebugVars); in runOnMachineFunction()
308 LiveRegMatrix &LRM = MFAM.getResult<LiveRegMatrixAnalysis>(MF); in run() local
313 VirtRegRewriter R(ClearVirtRegs, &Indexes, &LIS, &LRM, &VRM, &DebugVars); in run()
628 LRM->checkInterferenceLanes(BeforeMIUses, MIIndex.getRegSlot(), PhysReg); in liveOutUndefPhiLanesForUndefSubregDef()
H A DRegAllocGreedy.cpp179 LiveRegMatrix *LRM = nullptr; member
204 Matrix = Analyses.LRM; in RAGreedy()
228 LRM = &MFAM.getResult<LiveRegMatrixAnalysis>(MF); in RequiredAnalyses()
270 LRM = &P.getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM(); in RequiredAnalyses()
/freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/Orc/
H A DLazyReexports.h270 lazyReexports(LazyReexportsManager &LRM, SymbolAliasMap Reexports) { in lazyReexports() argument
271 return LRM.createLazyReexports(std::move(Reexports)); in lazyReexports()
/freebsd/share/i18n/csmapper/ISO-8859/
H A DISO-8859-8%UCS.src54 # the mapping of 0xAF and adding mappings for LRM and RLM.
H A DUCS%ISO-8859-8.src54 # the mapping of 0xAF and adding mappings for LRM and RLM.
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/Orc/
H A DLazyReexports.cpp290 std::unique_ptr<LazyReexportsManager> LRM(new LazyReexportsManager( in Create() local
294 return std::move(LRM); in Create()
/freebsd/share/misc/
H A Dpci_vendors24254 17d5 7030 X3110 Single Port LRM
24255 17d5 7031 X3120 Dual Port LRM